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1,428 Views
Registered: ‎11-29-2017

Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs

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Hello.

In the of "Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs" section of UG583 it is stated that:

 

"In many applications, only five power regulators are required to power a Zynq UltraScale+ MPSoC...the amount of consolidation that is possible depends on user requirements." 

 

In addition, I read that:

 

"Applications requiring access to these ultra-low power states that cannot be achieved via power gating options in software might need independent control of the power rails associated with each power domain to enable the power associated with unused domains to reduce to zero."

 

Question 1: The excel power estimator spreadsheet on the "PS" Tab has drop down lists for each power domain and I am wondering, when the processing system is under user config are the powered down drop-down lists in each power domains (Battery, LPD, and FPD) indicating that they can be turned off via software control registers? 

 

Question 2: If question 1 is true, is the static power truly 0W for that module (Dual RPS-R5, TCM, OCM, USB... etc)? In other words, I want to make sure that if I want to power down these modules in the LPD but use the LPD IO modules (QSPI, Gem0, UART, WDT0,...etc) that I do not need to provide separate regulators (power rails) to the PS FPD and LPD (VCC_PSINTFP, VCC_PSINTFP_DDR, and VCC_PSINTLP). 

 

Question 3: By connecting the device as shown on Figure 1-5 in UG583 (v1.12.1) do I still have the ability to power down the modules in the LPD such as (Dual RPS-R5, TCM, OCM, USB... etc)?

ps ultrascale.png

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Xilinx Employee
Xilinx Employee
1,799 Views
Registered: ‎08-25-2010

Re: Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs

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Hi @vanlandingham10,

 

This is handled by PMU.

You can refer to ug1199 at:

https://www.xilinx.com/support/documentation/user_guides/ug1199-zynq-power-management.pdf

 

Thanks

Simon

Thanks
Simon
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3 Replies
Xilinx Employee
Xilinx Employee
1,391 Views
Registered: ‎08-25-2010

Re: Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs

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Hi @vanlandingham10,

 

Q1. Yes.

Q2. Need to set LPD IO modules in I/O interfaces to see what's the current of these power rail.

Q3. Yes, can use power gating.

 

Thanks

Simon

 

Thanks
Simon
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1,382 Views
Registered: ‎11-29-2017

Re: Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs

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Thanks Simon! 

 

Is there documentation provided on how to us power gating? Is this done via software control registers? Can you point me in the right direction? Thanks.

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Xilinx Employee
Xilinx Employee
1,800 Views
Registered: ‎08-25-2010

Re: Power Supply Consolidation Solutions for Zynq UltraScale+ MPSoCs

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Hi @vanlandingham10,

 

This is handled by PMU.

You can refer to ug1199 at:

https://www.xilinx.com/support/documentation/user_guides/ug1199-zynq-power-management.pdf

 

Thanks

Simon

Thanks
Simon
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