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josephmcg
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Registered: ‎01-06-2016

Process of FPGA end of life migration of an old design to a new FPGA?

Hi,

 

Can someone walk me through the process of migration of a design to a new FPGA when that FPGA gets "end of life'd".

Any tips, general recommendations / best practices, or warnings of potential pitfalls would be much appreciated...

 

Specifically we have a product that uses Spartan 3E - Xilinx XC3S1200E-FG320-4. It's a 320 pin BGA part.

 

Assuming Xilinx stopped making it, what would be the best path to getting a product back in production?

 

1) (if possible) without a board spin?

 

Thank you

-Joe

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avrumw
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Registered: ‎01-23-2009

As far as I know, there are no plans to discontinue the Spartan-3E family (but I don't work for Xilinx and this information is not easily available). FPGA life cycles are EXTREMELY long, and I would be sure to get any information on discontinuation from your supplier or Xilinx directly.

 

That being said, if you wish to migrate from a Spartan-3E, you will absolutely have to spin your board. FPGAs are not pin compatible across families (at least up to and including 7 series). The Spartan-3E are fairly old, and would probably be best replaced either by a low end Spartan-6, or an Artix-7 (or maybe a Spartan-7, which was just announced, but no information is available yet).

 

Migrating RTL designs are relatively easy. Things get a bit more complex if the old design uses Intellectual Property (IP) - there isn't always a 1 to 1 correspondance between IP in one family vs. IP in a newer family. This will become even more true if there is an embedded processor (MicroBlaze) involved.

 

Clocking can also be a bit of a challenge. The clocking available in the Spartan-3E will be pretty different than what is available in later devices. But unless you are doing anything really complicated, the redesign of the clocking should be fairly easy - even if you move to a 7 series, where there aren't any DCMs; the MMCMs can duplicate all of the functionality of the DCM.

 

Other dedicated blocks (like RAMs and MULTs) will also need to be worked around - the newer devices have larger RAMs and DSP48 cells, which are supersets of the old MULT18.

 

And one final thing. You will need to move to a newer tool. Even if you use Spartan-6, you will need to move to a later version of ISE (v14.7). If you move to the 7 series, depending on the device, you may be able to stick with ISE, but you should probably consider moving to Vivado, since that this the tool that is used on all the newer families (Ultrascale and onward).

 

Avrum

austin
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Registered: ‎02-27-2008

j,

 

Avrum's post is excellent.  I would only add that we provide a one-year advisory of discontinuence, followed by a one year period to place a last time buy.  This is two years effective notice.

 

As mentioned, there are no plans to discontinue any device as far as I am aware, but you should discuss it with your authorized Xilinx distributor as some die/package combinations may get slated for being discontinued if the volume drops to where it is no longer viable.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
balkris
Xilinx Employee
Xilinx Employee
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Registered: ‎08-01-2008

Related information you can find here
http://www.xilinx.com/products/intellectual-property/ip-life-cycle-defns.html
Thanks and Regards
Balkrishan
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josephmcg
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Registered: ‎01-06-2016

Thank you all for all the good information.

 

To clarify, is that a 1 year advisory period on the fpga part/family (Spartan 3E 12000k gate)? Or is that on the package/die (320 pin BGA) combination assuming demand drops?

 

I've heard from my company that we estimated a 4.5 year till end of life on that part, but I'm not sure what/or where those numbers come from.

 

-Joe

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austin
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Registered: ‎02-27-2008

Joe,

 

Any change/discontinuence for any reason of any part/package is one year notice to another one year for last time buy.

 

Any other number is a guess, and is not official information from Xilinx.

 

If the part/package is a popular one, in high volume, it could be ten years until end of life.

 

In the past, popular part/packages have been sold for more than 15 years in some cases, even longer.

 

Your distributor can help you evaluate the risk.

 

 

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
bhargavmr
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Registered: ‎05-22-2013

Hi,

 

Looks like board respin can not be avoided while migrating to a newer FPGA family because of End Of Life Cycle issues. Are there any recomended guidelines for board design, so that migration to newer families consumes minimal time and involves less risk.

 

Regards

Bhargav

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kneild
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Registered: ‎01-15-2021

I have a similar question and I am not having any luck finding an answer.  I am using the Spartan 3 XC3SD1800A-4CS484I part and have been told it is obsolete.  Digi-key knows nothing about it.  Where can I find information on the life cycle of this part?  Thanks.

Kris

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bruce_karaffa
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Registered: ‎06-21-2017

You should go to the Spartan3 documentation page and look through the discontinuation notices.  https://www.xilinx.com/support/documentation-navigation/silicon-devices/mature-products/spartan-3.html .  I agree that they could make this information easier to find, but there you have it.  In any case, if it is hard to find now, it will only get worse.  Sooner or later you will need to bite the bullet and move to something newer. 

u4223374
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Registered: ‎04-26-2015

@kneild Mouser still has that chip listed as available (although with a long lead time), and they have stock of the -4CS484LI (low-voltage, drop-in replacement version). Additionally, the lead-free version (-4CSG484I) is readily available if switching to a lead-free soldering process is acceptable. It's probably not a bad time to start looking at replacements, but it's not critical yet.

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drjohnsmith
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Registered: ‎07-09-2009

As for general route on how to migrate

Before you try to move , you should have all these already, but I know it can get lost.

a) Ensure the code is in an RTL, be that VHDL or RTL

b) Ensure that you have the constraints, particularly clock frequencies

c) Ensure you have full and comprehensive set of test benches, both of individual modules and of the top level, preferably with a go  / no go answer

d) Ensure you have identified , fixed as many as possible, and documented the reason for all those you can not fix.

e) Have a good review of the code, remove any bad bits

f) Have good chat over a beer or two with those that know the code.

Do all these with the current tools in the current chip on the current board,

 

Only then, start looking at migrating,

You will definitely have to re spin the board, 

     Different families are not pin nor power compatible, 

 

You will be basically testing against the test bench, as this is the only insight you will have into the chips  working,

 

Just a word of warning,

   I have done a few of these over the decades,

      I once had a "simple" job to do,

  when I went through the above check list,

    I found there was no timing constraints, no test benches

        The number of warnings about latches was amazing,

            parts of the code were in schematics, parts in VHDL, others of un known origin as a black box

                  and zero documentation,

 

            Over a beer or two,

    turned out that an analog expert had made the "design" over many years, 

        The test method was, blow the code and see if it worked on the board,

               often it did not, so they re ran the synthesis again, to see if that worked..

 

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bruce_karaffa
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Registered: ‎06-21-2017

 One more thing, if you are used to working in ISE, download Vivado now and work through some examples.  Vivado can take a couple days to get comfortable with.  If all you are doing is replacing a Spartan3, the web pack license should cover any chip you might choose.

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