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FPGA1
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Registered: ‎01-26-2021

RF Data Converter Evaluation Tool ADC and DAC

I'm using the RFSoC zcu111.

What does the ADC Tile 1 represent (shown below)?

FPGA1_0-1614735561736.png

 

How does the interpolation work?

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pthakare
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Registered: ‎08-08-2017

Hi  @FPGA1 

In RFSoC Devices , There are tiles (Quad or Dual) containing 4 or 2 ADCs in single tile.

Tile numbering starts from 0, 1,...we do have numbering like ADC tile 224 , 225, 226, 227,

Here the Tile 1 corresponds to ADC tile 225,

pthakare_0-1614742457554.png

https://www.xilinx.com/support/documentation/ip_documentation/usp_rf_data_converter/v2_4/pg269-rf-data-converter.pdf

Refer this IP product guide for detailed information on tile numbering  

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FPGA1
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Registered: ‎01-26-2021

I looked at the document you indicated above, but still I didn't find the answers to my questions.

 

My questions are:

1. With these DAC and ADC settings why am I getting a 200 MHz?

FPGA1_0-1614789382455.png

 

FPGA1_1-1614789404015.png

 

 

FPGA1_2-1614789421540.png

 

 

FPGA1_3-1614789435439.png

 

 

2. How can I expand the ADC graph area, I want to see 6000 MHz?

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pthakare
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Registered: ‎08-08-2017

Hi @FPGA1 

For the ADC graph , the 200MHz is default there, it does not have any significance  , the actual frequency you can check in the graph , 

As you can see you have 600MHz range in the graph,

pthakare_0-1614851943454.png

 

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klumsde
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Registered: ‎04-18-2011

This field on the ADC capture tab is there to help the tools compute the Signal metrics like the interleaving spur location and harmonics I reckon. 

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FPGA1
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Registered: ‎01-26-2021

Could you please explain what do you mean by the default?

I want to expand the span of the graph to see the full 6000 MHz, to see if there are any additional peaks. Because when I attached a spectrum analyzer I was able to see additional peaks in the 4000 MHz.

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FPGA1
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Registered: ‎01-26-2021

Is there a way to see how these tools compute the signal metrics?

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FPGA1
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I'm still not able to understand the ADC reading. Xilinx, you guys provide zero technical support. We are seriously considering using a different FPGA.

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pthakare
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Registered: ‎08-08-2017

Hi @FPGA1 

Sorry we missed this. your main objective here is to see full 6000 MHz, right? It seem there is way to edit the axis range to directly configure the start and/or end values for best plot observation.

I have not yet tried this feature and will check this at my end shortly . Can you please also check if with this feature you able to expand the graph?

pthakare_0-1616462518494.png

 

 

 

 

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klumsde
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Registered: ‎04-18-2011

Hi @FPGA1 

I'll try to answer your questions here. 

What does the ADC Tile 1 represent (shown below)?

The ADC's and DACs are arranged in Tiles. /zcu111 has a 28DR device which has dual tiles. So there are 2 ADC channels per tile. 

With these DAC and ADC settings why am I getting a 200 MHz?

You're not. It's clear from the FFT you are showing us that you are not inputting a signal at 200Mhz. The box in the GUI for Centre Frequency is there to aid the tools compute the signal metrics and it also provides a suggestion beside for an input tone to make the FFT coherent, but you can just pick a windowing option to make the FFT look better here. 

How can I expand the ADC graph area, I want to see 6000 MHz?

So the FFT won't show this no matter what you try to set the axis to. First of all the ADC samples at a maximum of 4GSPS and the input to the ADC won't be able to see anything above 4GHz, since this is what the input bandwidth is. Second of all the ADC samples the signal but you only get the first nyquist zone (FS/2), anything in the second nyquist zone FS/2 < Fin <FS will fold (alias) into the first nyquist. A simple experiment with the ZCU111 would show this.

I'm still not able to understand the ADC reading. Xilinx, you guys provide zero technical support. We are seriously considering using a different FPGA.

The problem seems to be with your ADC knowledge. What do you need to understand? Are you trying to sample something and don't see it? Is the specturm not what you expect? 

Is there some ADC setting you don't understand?

Please let us know what exactly you want to know. I've already explained here why you won't see the spectrum out to 6GHz

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