10-29-2020 12:31 AM
Calibration always says succeed, but sometimes the Internal adc cores show different DC offset, and that makes the sample result with n*Fs/8 spurs（Shown in picture, I Set the Sample rate to 3Gsps.）
Even when I sample the Noise, the DC different is still very clear. The second picture shows 2 4GADC's Sample Points. Let's see the orange one. The wave repeats every 8 points, which mean the 8 ADC internal channels. The full scale is ±32768，but the DC offset of each 500Msps channel is up to 4000.
How to avoid the this DC offset or calibration failure?
the device is RFSOC27DR, in Vivado and SDK 2018.1
10-30-2020 02:47 PM
Can you confirm the location of this input signal please?
If you put a signal that is a CW that is an integer sub multiple of the ADC fs then you can desensitize the background calibration.
It needs diversity of data in each sub interleaved adc, so giving each sub adc the same sample over a and over will cause the calibration to stop working and give you plots where the spectrum is messed up be interleaving spurs
11-01-2020 11:17 PM
Even when sampling noise, this situation still occurs.
But I found a law, when sampling in 4Gsps， this will not happen. But when in 3Gsps, it happens 8 times in 10 times.
11-02-2020 01:27 AM
the BG calibration needs to have input power to converge so sampling no signal won't improve it.
What is the input tone you are putting in?
Can you try one other thing. when the sample clock is 3Ghz, turn off the dither and see if this improves. I expect the calibration is the cause here but want to check on the dither as well
11-02-2020 01:48 AM
The input signal is 10MHz@2dBm.
You mean BG calibration without any input will make the result worse?
I am using sdk 2018.1 so the library doesn't include the API about "dither"，but I found this API in sdk 2019.1，I will try this and tell you what happends.
Thank you for your reply.