Ultrascale RLDRAM3 MIG (Invalid core)

[jangbiemee]

Hi,

I’m implementing an RLDRAM3 interface using the RLDRAM3 MIG. The RTL simulation, synthesis, and implementation processes completed without error, but the following problems occurred after the FPGA program process:

CRITICAL WARNING: [Xicom 50-46] One or more detected MIG version registers have empty values: MIG properties will not be built.
Parameter Map Version: 0, Error Map Version: 0, Calibration Map Version: 0, Warning Map Version: 0
INFO: [Labtools 27-2302] Device xcvu190 (JTAG device index = 0) is programmed with a design that has 1 MIG core(s).
WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.
WARNING: [Labtoolstcl 44-130] No matching hw_ilas were found.

Referring to AR# 64923, I added the ’calibration_rld3.elf’ to the project. However, this problem has not been solved yet. Note that the ‘microblaze_mcs_rld3.bmm’ file does not exist in my source folder.

My platform and Vivado version information are as follows:
* Platform: Virtex UltraScale VCU110 Evaluation Platform (xcvu190-flgc2104-2-e)
* Vivado version: Vivado 16.4

Any advice is welcome. Thank you for your time.

[vemulad]

Hi @jangbiemee

Did you generate the RLDRAM IP following the steps in the below doc https://www.xilinx.com/member/forms/download/design-license.html?cid=a7a77853-c687-443a-956b-b1654c09e460&filename=xtp376-vcu110-mig-c-2016-4.pdf ?

This error is seen if the input clock or reset to the RLDRAM IP are not proper.

Are you adding RLDRAM IP XCI or DCP to the project? 

[jangbiemee]

Hi Deepika,

Thank you for your information.

BTW, where can I get the 'RDF0338 - VCU110 MIG Design Files (2016.4 C) zip' file? I've only found the 2016.3 version without the rld3_36b design on Virtex UltraScale Design Hub - VCU110 Development Kit.

Thank you.

[vemulad · Accepted solution]

Hi @jangbiemee

You can find the 2016.4 files here https://www.xilinx.com/member/forms/download/design-license.html?cid=0cb09bf1-1e8a-4be6-b337-884a2bfd8199&filename=rdf0338-vcu110-mig-c-2016-4.zip

[jangbiemee]

Hi Deepika, 

The problem has been resolved. Especially, the 'example_design.xdc' file and 'Reference Input Clock Speed' information were helpful. Thank you very much.