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axeldfae
Contributor
Contributor
1,080 Views
Registered: ‎12-31-2018

Ultrscale decoupling capacitor discrepancy between UG583 and Ultrascale schematic checklist

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My customer is designing a PCB with XCZU15EG-FFVB1156I. 

Looking for guidance where the UG583 and Ultrascale schematic checklist disagree:

We’re finding that the decoupling capacitance in the schematic checklist is recommending a 4.7 uF capacitor in most of the rails (both PL and PS).  The UG583 PCB design Table 1-9 (PL) and 1-10 (PS) list 100, 47, and 10 uF caps, but no 4.7 uF. Which is correct ?

VCC_PSDDR_PLL states to use a 0.47 to 4.7 uF decoupling cap (0402) placed near the via to GND in the checklist.  In UG583 PCB guide, Figure 1-1 shows 1.0 to 10 uF as well as the text under Figure 1-2; however, Figure 1-2 matches the checklist in the small blue box and green via to GND on the right side.  Which one do we implement?

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sandrao
Community Manager
Community Manager
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Registered: ‎08-08-2007

Hi @axeldfae 

VCC_PSDDR_PLL states to use a 0.47 to 4.7 uF decoupling cap (0402) placed near the via to GND in the checklist.

I checked with the author of the PCB Guide and I've filed a change request to remove the reference to the 0.47uF on the Figure 1-2 in the PCB Guide and also to update the Schematic Checklist to say 1.0uF and 10uF.

If a customer already designed with 0.47uF and 4.7uF everything will still be fine but the up to date recommendation is a 1.0 μF 0201 or 10 μF 0402 capacitor must be placed near the VCC_PSDDR_PLL  BGA via.

 

Sandy

Thanks,

Sandy


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sandrao
Community Manager
Community Manager
959 Views
Registered: ‎08-08-2007

Hi @axeldfae 

Looking at the checklist and the PCB UG I see 47uF as the recommended value in both. Can you let me know which rail is 4.7uF in the Checklist?

pcb_2.PNGpcb_1.PNG

 

In relation to the second question I'll double check and get back to you.

 

Sandy

 

 

Thanks,

Sandy


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Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub , Versal Blogs and the Versal Useful Resources .

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sandrao
Community Manager
Community Manager
912 Views
Registered: ‎08-08-2007

Hi @axeldfae 

VCC_PSDDR_PLL states to use a 0.47 to 4.7 uF decoupling cap (0402) placed near the via to GND in the checklist.

I checked with the author of the PCB Guide and I've filed a change request to remove the reference to the 0.47uF on the Figure 1-2 in the PCB Guide and also to update the Schematic Checklist to say 1.0uF and 10uF.

If a customer already designed with 0.47uF and 4.7uF everything will still be fine but the up to date recommendation is a 1.0 μF 0201 or 10 μF 0402 capacitor must be placed near the VCC_PSDDR_PLL  BGA via.

 

Sandy

Thanks,

Sandy


------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub , Versal Blogs and the Versal Useful Resources .

------------------------------------------------------------------------------------------------

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drjohnsmith
Teacher
Teacher
904 Views
Registered: ‎07-09-2009
Its no excuse, but I can see how this happens.

Recommending decoupling values and numbers is at best an art form,
the biggest contributor to the power supply performance is the board layout.

Having designed a few evaluation boards for companies, I can say at the time the boards are designed, hard information is not generally available, and conservative design is the order of the day,


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axeldfae
Contributor
Contributor
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Registered: ‎12-31-2018

Thank you for the clarification. The board design and layout is underway and will incorporate the recommendation.

 

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alionneemah
Observer
Observer
847 Views
Registered: ‎11-28-2017

From version 1.7 (03 July 2019) of XTP427:

Capture.PNG

Capture2.PNG

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alionneemah
Observer
Observer
844 Views
Registered: ‎11-28-2017

The decoupling guidelines were updated in v1.8 to match UG583 for this very thing. That's why it wasn't consistent in version 1.7, but that has been fixed in 1.8.  

This is the readme.txt from v1.8 of XTP427:

Capture3.PNG 

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