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Registered: ‎01-06-2020

Using HSDAC and HSADC cells

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Hello, I have a ZCU111 so a Zynq+ RFSoC. I saw the example design using the Zynq+ UltraScale DataConverter IP Block, inside it, I checked after the physical was done and found the HSADC and HSDAC physical blocks. I'm building a system prototype with this board and I would like to directly use the ADC and DAC blocks on this device, without having to use the DataConverter IP  block since it uses AXI stream, we need plenty of layers in between, so I wanted a more raw approach, where I can sample my signals, regenerate them all on m RTL. How can I do that? where to find the macro to instantiate these cells? where is the documentation for them?

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pthakare
Moderator
Moderator
374 Views
Registered: ‎08-08-2017

Hi @muscularbeaverwhoosh

Entry level for RF-DAC and RF-ADC resources in design is to use data converter IP only , We don't have instantiation template or Macro for RF-ADC/DAC and other features in IP (DDC/DUC , NCO , QMC..)

 

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1 Reply
pthakare
Moderator
Moderator
375 Views
Registered: ‎08-08-2017

Hi @muscularbeaverwhoosh

Entry level for RF-DAC and RF-ADC resources in design is to use data converter IP only , We don't have instantiation template or Macro for RF-ADC/DAC and other features in IP (DDC/DUC , NCO , QMC..)

 

-------------------------------------------------------------------------------------------------------------------------------
Reply if you have any queries, give kudos and accept as solution
-------------------------------------------------------------------------------------------------------------------------------

View solution in original post