cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
joe306
Scholar
Scholar
622 Views
Registered: ‎12-07-2018

What is all this ACAP stuff?

Jump to solution

Hello, I've been working with FPGA for some time now and I'm used to seeing new devices with faster transceivers, more transceivers, more memory and in recent times more embedded ARM cores. But for me I'm having a hard time visualizing how this new ACAP can benefit me. I have not done any AI work and therefore don't know how the AI Engines would be used. With that I would not know where to begin with the " Versal Adaptable Hardware" block. I'm not the sharpest knife in the drawer but I don't get much out of the youtube talks on the ACAP. Too many managers speaking high level examples that don't mean much to a hardware engineer that spends his time pushing bits back and forth. When I read over the new Agilex device I can relate to everything on the web site. Not so with the ACAP and that makes it hard when deciding to choose this device on a next design. Is there any documentation that can help me get a better understanding? I think when a company releases something that most can't relate to and then has to instruct people what its supposed to do then that is kinda poorly planed. My intention is to anger anyone but only to voice my honest opinion about what the ACAP is supposed to achieve.

 

Respectfully,

Joe

Tags (1)
1 Solution

Accepted Solutions
florentw
Moderator
Moderator
548 Views
Registered: ‎11-09-2015

Hi @joe306 

One thing is that Versal (i.e. the first ACAP family) is still in Early Access so not all the documentation can be provided on publicly (i.e. on the forums).

The best way to start would be to read the following article:

https://forums.xilinx.com/t5/Adaptable-Advantage-Blog/To-Versal-Or-Not-To-Versal-That-Is-The-Question/ba-p/1137424

And I would make sure you read the following line:

“Why should I move to Versal™ ACAP and is now the right time to do so?” It’s a great question, and the answer is easy… “It depends.”

So this is to say that this is not exactly just a node change. This is also a new architecture. So this is not just the matter of bigger and faster. The selection of this device might depend on your application

Among the changes, there is the NoC, which I would describe (in a really high level view) as an harden AXI4 interconnect across the device. The NoC main function is to efficiently move data between the DDR controllers and the rest of the device.

There is also the AI Engine array. First note that this is note that this is not part of all versal devices. The "AI" part of the name might be confusing. There is not real definition of what AI means for the AI Engine. But you can find a lot Adaptable Intelligent engine.  The AI Engine is well suited for Artificial Intelligence but this is not all it can do. This is also well suited for DSP applications. You might find some details about the AI Engine in my article:
https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/Versal-ACAP-AI-Engines-for-Dummies/ba-p/1132493 

More documentation will be available with the 2020.2 release (when the Versal device will become public access). This might help clarifying your mind


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

3 Replies
olupj
Explorer
Explorer
594 Views
Registered: ‎01-27-2008

@joe306 

Kudo for invoking Bob Pease!

0 Kudos
florentw
Moderator
Moderator
549 Views
Registered: ‎11-09-2015

Hi @joe306 

One thing is that Versal (i.e. the first ACAP family) is still in Early Access so not all the documentation can be provided on publicly (i.e. on the forums).

The best way to start would be to read the following article:

https://forums.xilinx.com/t5/Adaptable-Advantage-Blog/To-Versal-Or-Not-To-Versal-That-Is-The-Question/ba-p/1137424

And I would make sure you read the following line:

“Why should I move to Versal™ ACAP and is now the right time to do so?” It’s a great question, and the answer is easy… “It depends.”

So this is to say that this is not exactly just a node change. This is also a new architecture. So this is not just the matter of bigger and faster. The selection of this device might depend on your application

Among the changes, there is the NoC, which I would describe (in a really high level view) as an harden AXI4 interconnect across the device. The NoC main function is to efficiently move data between the DDR controllers and the rest of the device.

There is also the AI Engine array. First note that this is note that this is not part of all versal devices. The "AI" part of the name might be confusing. There is not real definition of what AI means for the AI Engine. But you can find a lot Adaptable Intelligent engine.  The AI Engine is well suited for Artificial Intelligence but this is not all it can do. This is also well suited for DSP applications. You might find some details about the AI Engine in my article:
https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/Versal-ACAP-AI-Engines-for-Dummies/ba-p/1132493 

More documentation will be available with the 2020.2 release (when the Versal device will become public access). This might help clarifying your mind


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

joe306
Scholar
Scholar
538 Views
Registered: ‎12-07-2018
Thank you very much for the detailed response.
Joe
0 Kudos