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Adventurer
Adventurer
532 Views
Registered: ‎06-30-2016

XCKU5P system clock

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Hello,

The user guide of the evaluation board KCU116 (link here page 28) shows two system clocks: 300MHz and 125MHz. Which datasheet shows the min/max frequency of these system clocks? I need to find out this info for either XCKU3P or XCKU5P.

Thanks in advance!

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Moderator
Moderator
424 Views
Registered: ‎08-08-2017

Re: XCKU5P system clock

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Hi @alex83uk

The Maximum Frequency Supported by FPGA is decided based on Fmax Specification of BUFG. You can get this specification in datasheet of KU+ device under the Clock Buffers Switching Characteristics section.

https://www.xilinx.com/support/documentation/data_sheets/ds922-kintex-ultrascale-plus.pdf

 

 

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10 Replies
Moderator
Moderator
519 Views
Registered: ‎09-15-2016

Re: XCKU5P system clock

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Hi @alex83uk

Both the system clocks are generated from Silicon Labs SI5335A quad clock generator/buffer (U170). The max and min values of the frequency generated from it is mentioned in the below link, page 7:

https://www.silabs.com/documents/public/data-sheets/Si5335.pdf

si5335.JPG

Regards
Rohit
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Adventurer
Adventurer
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Registered: ‎06-30-2016

Re: XCKU5P system clock

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Hello @thakurr thank you for your reply, however I would like to know at what frequency the XCKU5P should operate (min/max values similar to the picture you posted). Does it need exactly 300MHz? Could it be 200MHz for example? And what document shows this info?

Thank you.

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Moderator
Moderator
490 Views
Registered: ‎09-15-2016

Re: XCKU5P system clock

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Hi @alex83uk

XCKU5P is provided with clock source like system clock (for our KCU116 board) from SI5335 oscillator which supports max of 350 Mhz freq. Any combination of output frequencies ranging from 1 to 350 MHz can be configured on each of the device outputs.

si5335_macx.JPG

Similarly you can configure the frequency of other clock oscillators as mentioned in their respective data sheets.

Further frequency coming from these clock oscillatosr into the FPGA can be divided with the help of clock management unit like MMCM,PLL etc. Refer UG572 for details on MMCM and PLL and below link for their frequency related specs.

https://www.xilinx.com/support/documentation/data_sheets/ds922-kintex-ultrascale-plus.pdf

Regards
Rohit
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Adventurer
Adventurer
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Registered: ‎06-30-2016

Re: XCKU5P system clock

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Hi @thakurr

Sorry but that's not really the answer I was hoping to get. Maybe I wasn't very clear. Let's forget about the Si5335 oscillator for a moment.

What frequency should I apply to pins K22 & K23? Is it strictly 300MHz? Could it be 200MHz for example?

 

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Moderator
Moderator
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Registered: ‎09-15-2016

Re: XCKU5P system clock

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Hi @alex83uk

Sorry may be i was n't clear with my statements.

Pins K22 & K23 are mapped to differential system clock (300 Mhz) coming from Silicon Labs SI5335A quad clock generator/buffer (U170) on our KCU116 board (having XCKU5P FPGA).

kcu59.JPG

If you wish to use this device (XCKU5P) for your custom board then you can use S15335 oscillator (or any other oscillator which supports your desirable frequency) which supports max of 350 Mhz freq and you can configure any range of frequency from 1 to 350 Mhz on the device outputs as mentioned in the SI5335 data sheet shared before. Refer data sheet for details on configuration

Just FYI If you wish to further divide the frequency (coming from this oscillator) inside the FPGA then you can use clock management units like MMCM, PLL in your design.

Hope this helps. Let me know if there are any concerns.

Regards
Rohit
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Adventurer
Adventurer
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Registered: ‎06-30-2016

Re: XCKU5P system clock

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Hi @thakurr

You wrote "If you wish to use this device (XCKU5P) for your custom board then you can use S15335 oscillator (or any other oscillator which supports your desirable frequency)".

What if my desirable frequency is 200MHz? Would the XCKU5P work?

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Moderator
Moderator
425 Views
Registered: ‎08-08-2017

Re: XCKU5P system clock

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Hi @alex83uk

The Maximum Frequency Supported by FPGA is decided based on Fmax Specification of BUFG. You can get this specification in datasheet of KU+ device under the Clock Buffers Switching Characteristics section.

https://www.xilinx.com/support/documentation/data_sheets/ds922-kintex-ultrascale-plus.pdf

 

 

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Adventurer
Adventurer
405 Views
Registered: ‎06-30-2016

Re: XCKU5P system clock

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Hello @pthakare

Thank you! That's exactly what I needed!

So I'm guessing that the minimum supported frequency would be 70MHz? (PLL_FINMIN) - same datasheet page 36.

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Moderator
Moderator
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Registered: ‎08-08-2017

Re: XCKU5P system clock

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Hi @alex83uk

No . There is no limitation for minimum supported frequency. 

 

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Adventurer
Adventurer
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Registered: ‎06-30-2016

Re: XCKU5P system clock

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Thank you @pthakare

In this case I'm going to use 200MHz.

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