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peter84
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Registered: ‎09-22-2020

Zynq UltraScale+ RFSoC ADC clock source sharing

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Dear All,

 

I'm building an application on the ZCU111 Evaluation Kit in which I need to run 6 ADCs at 2GS/s. I think I understand how to configure the IP block in Vivado and the next step would be to connect the IP block to the rest of the design.

My issue at this moment is that I have a single differential clock source for the ADCs connected via the FMC connector. I would like to use this single clock source to drive the 3 ADC clocks at the edge of the IP block. 

I can only connect 1 adc clock pin to the clock pin I created. When I try to connect a second ADC clock pin to the clock port the tool does not allow it.

Is there a methode to connect the three ADC clocks to a single clock source? If so how do I do this? Our is this a setting inside the IP GUI?

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klumsde
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502 Views
Registered: ‎04-18-2011

These are the ADC tile input clock. 

they either provide the sample clock to the tile or the reference clock to the PLL in the tile if you are using this feature. 

In this case they should be made external as they are separate, dedicated inputs to the device. 

These inputs are connected to the LMX PLLs on the board. 

Take a look at figure 3-18 in the zcu111 user guide

https://www.xilinx.com/support/documentation/boards_and_kits/zcu111/ug1271-zcu111-eval-bd.pdf

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klumsde
Moderator
Moderator
503 Views
Registered: ‎04-18-2011

These are the ADC tile input clock. 

they either provide the sample clock to the tile or the reference clock to the PLL in the tile if you are using this feature. 

In this case they should be made external as they are separate, dedicated inputs to the device. 

These inputs are connected to the LMX PLLs on the board. 

Take a look at figure 3-18 in the zcu111 user guide

https://www.xilinx.com/support/documentation/boards_and_kits/zcu111/ug1271-zcu111-eval-bd.pdf

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

peter84
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Registered: ‎09-22-2020

Thanks for the quick and clear reply Klumsde. This is very helpfull