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wlin2
Visitor
Visitor
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Registered: ‎11-21-2016

zcu102 pin AJ5 pulldown issue

I tried to pull down the differential pair input pin AJ5/AJ6 in zcu102, so I expected 0V when no external device is connected to fmc. Here is what i did in vivado:

 

In tcl: set_param iconstr.diffPairPulltype same

in xdc:

#D9 in fmc
set_property -dict {PACKAGE_PIN AJ5 IOSTANDARD LVDS} [get_ports signal_n]
#D8 in fmc
set_property -dict {PACKAGE_PIN AJ6 IOSTANDARD LVDS} [get_ports signal_p]

 

set_property PULLDOWN true [get_ports signal_p]
set_property PULLDOWN true [get_ports signal_n]

 

After I downloaded the fpga image (without external device connection), I probed the fmc interface voltage with oscilloscope. The AJ6 (or D8 in fmc) is 0V, but AJ5(or D9 in fmc) is 1.8V.

 

Why I cannot pull down pin AJ5? Any special features about pin AJ65?

Note: In zcu102, AJ5 is in bank 65 powered by FMC_VADJ = 1.8V while FMC pin D9 is powered by UTIL_3V3 = 3.3V.

 

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austin
Scholar
Scholar
1,712 Views
Registered: ‎02-27-2008

w,

 

First check your warnings.  I suspect the tools are throwing out the pull down, as it makes no sense to pull down the LVDS standard (nor pull up, either).  The default is weak pull up on all IO, (if so set), and I suspect that takes precedence.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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