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Explorer
Explorer
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Registered: ‎09-06-2019

2019.1 VCU TRD HDMI Rx as DVI-D Rx

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Hi,

I'm currently in the process of bringing up a custom design and concurrently testing the 2019.1 TRD HDMIRX project. My goal is to connect a DVI-D source in place of the HDMI as the source. I've been working through some issues on our custom board here:

 

https://forums.xilinx.com/t5/Video/HDMI-DVI-Rx-fails-to-detect-link/m-p/1076387#M30777

While debugging the custom design I'm concurrently  testing on the ZCU106 by loading the vcu_hdmirx project and connecting a DVI test source through a DVI-HDMI converter to the HDMI rx port on the ZCU106. Though a native HDMI source is detected correctly, when connecting a DVI source the video link is no longer detected which results in similar behavior seen on our custom board.

 

Connecting HDMI source:

 

# media-ctl -d /dev/media0 -p
Media controller API version 4.19.0

Media device information
------------------------
driver          xilinx-video
model           Xilinx Video Composite Device
serial
bus info
hw revision     0x0
driver version  4.19.0

Device topology
- entity 1: vcap_hdmi output 0 (1 pad, 1 link)
            type Node subtype V4L flags 0
            device node name /dev/video0
        pad0: Sink
                <- "a0080000.v_proc_ss":1 [ENABLED]

- entity 5: a0080000.v_proc_ss (2 pads, 2 links)
            type V4L2 subdev subtype Unknown flags 0
            device node name /dev/v4l-subdev0
        pad0: Sink
                [fmt:Y8_1X8/1280x720 field:none colorspace:srgb]
                <- "a0000000.v_hdmi_rx_ss":0 [ENABLED]
        pad1: Source
                [fmt:Y8_1X8/1920x1080 field:none colorspace:srgb]
                -> "vcap_hdmi output 0":0 [ENABLED]

- entity 8: a0000000.v_hdmi_rx_ss (1 pad, 1 link)
            type V4L2 subdev subtype Unknown flags 0
            device node name /dev/v4l-subdev1
        pad0: Source
                [fmt:RBG888_1X24/1920x1080 field:none colorspace:srgb]
                [dv.caps:BT.656/1120 min:0x0@25000000 max:4096x2160@297000000 stds:CEA-861,DMT,CVT,GTF caps:progressive,reduced-blanking,custom]
                [dv.detect:BT.656/1120 1920x1080p60 (2200x1125) stds:CEA-861 flags:CE-video]
                -> "a0080000.v_proc_ss":0 [ENABLED]

 

 

Connecting DVI converted to HDMI

# media-ctl -d /dev/media0 -p
Media controller API version 4.19.0

Media device information
------------------------
driver          xilinx-video
model           Xilinx Video Composite Device
serial
bus info
hw revision     0x0
driver version  4.19.0

Device topology
- entity 1: vcap_hdmi output 0 (1 pad, 1 link)
            type Node subtype V4L flags 0
            device node name /dev/video0
        pad0: Sink
                <- "a0080000.v_proc_ss":1 [ENABLED]

- entity 5: a0080000.v_proc_ss (2 pads, 2 links)
            type V4L2 subdev subtype Unknown flags 0
            device node name /dev/v4l-subdev0
        pad0: Sink
                [fmt:Y8_1X8/1280x720 field:none colorspace:srgb]
                <- "a0000000.v_hdmi_rx_ss":0 [ENABLED]
        pad1: Source
                [fmt:Y8_1X8/1920x1080 field:none colorspace:srgb]
                -> "vcap_hdmi output 0":0 [ENABLED]

- entity 8: a0000000.v_hdmi_rx_ss (1 pad, 1 link)
            type V4L2 subdev subtype Unknown flags 0
            device node name /dev/v4l-subdev1
        pad0: Source
                [fmt:RBG888_1X24/1920x1080 field:none colorspace:srgb]
                [dv.caps:BT.656/1120 min:0x0@25000000 max:4096x2160@297000000 stds:CEA-861,DMT,CVT,GTF caps:progressive,reduced-blanking,custom]
                [dv.query:no-link]
                -> "a0080000.v_proc_ss":0 [ENABLED]		

The RX SS does seem to recognize that it is connected to a DVI source but is still unable to detect the stream:

# cat /sys/devices/platform/amba_pl@0/a0000000.v_hdmi_rx_ss/hdmi_info

Rx Info
--------
Mode: DVI
Status: No input stream detected

Link quality
------------
Link quality channel 0 : good (313)
Link quality channel 1 : good (313)
Link quality channel 2 : good (310)

Additionally thanks to @watari, I've checked the EDID to ensure that the our frame size and rate is supported. 

Is there some sort of configuration I am missing to enable DVI-D support or should the HDMI RXSS detect a DVI stream automatically?

Thanks in advance!

 

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

@badFITimage 

In most case that DVI signals are transmitting from HDMI cable, it works fine.

But some DVI source doesn't follow HDMI protocols. For example, the TMDS Clock isn't good enough, some source was produced before HDMI 1.4 protocol. It doesn't send valid CTRL word.

But DVI-D to HDMI adapter hasn't be tested. We don't have plan to support DVI-D HDMI adapter source at the moment. If you want to request this feature, please work with your FAE, so he can pass on feedback to our marketing team.

View solution in original post

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @badFITimage 

 

>While debugging the custom design I'm concurrently testing on the ZCU106 by loading the vcu_hdmirx project and connecting a DVI test source through a DVI-HDMI converter to the HDMI rx port on the ZCU106.

 

What kind of DVI-HDMI converter are you using ?

Also, how do you deal with "Infoframe" on HDMI protocol ?

 

I suspect this gadget can't work correctly and can't issue proper infoframe...

 

Best regards,

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Explorer
Explorer
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Registered: ‎09-06-2019

Hi @watari,

I'm using using a DVI test pattern generator and a HDMI camera as the test sources.

For the DVI TPG I use a DVI to HDMI connector to mate with the dev board using something like this:

ABEW_1_20170127617893839.jpg

Such that the setup is as follows:

DVI Test Pattern Generator <-> DVI-D Cable <-> DVI to HDMI connector <-> ZCU106.

 

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @badFITimage 

 

What kind of DVI TPG are you using ? Your custom TPG or Vendor's TPG ?

Also Which video timing do you follow (include polarity type of each sync signals) ? VESA CVT video timing or CEA video timing ? or other ?

 

Best regards,

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Explorer
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Registered: ‎09-06-2019

Hi @watari,

My mistake I meant to mention the TPG we are using. We're using a device from DVIGEAR, the DVI-7010a. I believe it has the ability to produced both (I'm still not 100% after looking at the user manual) though we have cycled through each and have not had success with link detection.

I plan on gaining some insight to the video phy module by connecting a DVI source and dump the video phy registers.

Edit: Additionally would the running the hdmi_info, hdmi_log, vphy_info, and vphy_log actually show anything in DVI mode? Our DVI source only provides the 3 pairs of differential data lines and the pair of clocks. Since there isn't a DDC path I dont think the RXSS/VPHY would be able to detect a DVI source? Though i believe the media graph should see something rather than 'no-link'. 

 

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @badFITimage 

 

I confirmed DVI 7010a's manual.

I'm sure that it's an environment issue. DVI 7010a doesn't seem to have enough capability what you want to do with ZCU 106.

So, I strongly recommend to change source device or make sure video timing to consider workaround.

 

Best regards,

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Explorer
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Registered: ‎09-06-2019

Hi @watari,

| I'm sure that it's an environment issue. DVI 7010a doesn't seem to have enough capability what you want to do with ZCU 106.

To clarify this point is it limitations in the source hardware, ZCU106 hardware, or the HDMI IP? Our custom design has direct pins that route DVI-D data and clock signals directly to a GT bank. Is this configuration valid at least from the perspective of DVI-D source to Xilinx HDMI RX SS/VPHY? Would our test pattern generator work in that configuration? We also have other sources we can try like cameras and PCs.

Thanks as always for your guidance.

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @badFITimage 

 

Sorry for my wrong explanation.

 

Here is my opinion.

 

 DVI-7010a doesn't have an enough capability for compliance test in this case.

So you are facing this issue. (Link status is good. But no input stream detected.)

 

Would you change video source to make sure it ?

 

Best regards,

 

 

 

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Registered: ‎09-06-2019

Hi @watari,

I did give it a go with another source but had the same issue. At this point we probably are going to move to trying to integrate the HDMI IP on our custom design. One follow up question I have is that our board simply has a direct connection from the DVI-D source to the Zynq PL. Is this a valid configuration? We don't have anything in the way of DVI re-timers or any circuitry for HPD or cable detects.

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @badFITimage 

 

>One follow up question I have is that our board simply has a direct connection from the DVI-D source to the Zynq PL. Is this a valid configuration?

 

I'm sure that you don't need external retimer device in your case.

Because your target resolution is small. (I guess under FHD.)

But, I suggest you to add a circuitry for HPD, if your product require re-connection (hot plug detect) in normal operation.

 

- The meaning of HDMI Rx IP status

 

I'm probably sure that HDMI Rx doesn't recognize resolution and vertical frequency. (Physical layer is fine. But logical layer is bad.)

I guess this signal doesn't follow VESA and/or CEA video timing.

So, if you add information table which Xilinx already mentioned or modify video timing to follow VESA and/or CEA video timing, you fix this issue.

 

Best regards,

 

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

@badFITimage 

HDMI Rx IP hasn't been validated with DVI-D to HDMI converter.

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Explorer
Explorer
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Registered: ‎09-06-2019

Hi @xud,

Thanks for the info! Has the HDMI Rx SS and Vphy IP been tested with a true DVI-D source? Our custom board utilizes an ultrascale+ in which we route DVI-D signals directly from a connector to the GTH block and I would like to confirm that HDMI Rx related IP is able to correctly function with this type of input.

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

@badFITimage 

All the equipment tested by HDMI Rx IP is documented in page 85-86 of PG236 : https://www.xilinx.com/support/documentation/ip_documentation/v_hdmi_rx_ss/v3_1/pg236-v-hdmi-rx-ss.pdf

No,  HDMI Rx SS and Vphy IP hasn't been tested with a true DVI-D source.

 

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Registered: ‎09-06-2019

@xud 

Ok I see. 

To confirm - though the IP has never been tested with DVI it should still support it, correct? Looking through the reference manual it looks like this mode is valid:

PG 12: "When the HDMI 1.4/2.0 RX Subsystem is used in DVI mode..."

AR #67045: https://www.xilinx.com/support/answers/67045.html

Just want to make sure I'm not chasing something I can't implement. Thanks again!

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

@badFITimage 

In most case that DVI signals are transmitting from HDMI cable, it works fine.

But some DVI source doesn't follow HDMI protocols. For example, the TMDS Clock isn't good enough, some source was produced before HDMI 1.4 protocol. It doesn't send valid CTRL word.

But DVI-D to HDMI adapter hasn't be tested. We don't have plan to support DVI-D HDMI adapter source at the moment. If you want to request this feature, please work with your FAE, so he can pass on feedback to our marketing team.

View solution in original post

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