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1,695 Views
Registered: ‎07-25-2017

ADV7511 problems on KCU116 - can not force native monitor resolution

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Hello everybody,

I am experiencing a strange problem while working with HDMI output on KCU116. I think somebody can help me.

 

I have the design that makes use of: Video Timing Controller, VDMA and 'Axi Stream to Video Out'. Then the information about:

- video clock

- active video

- hsync

- vsync

- video data 

is forwarded to ADV7511 with apropriate set of constraints.

 

In  the SDK I am programming ADV7511 via I2C (and I am able to read back proper values). VDMA is also initialized with (I think) proper values. The fun starts when I run my FPGA.

 

By default I want my design to output 1080p video (vtc set to 1080p). When I pair my Evaluation Board with my LG monitor (2560 x 1080 natively) I get the results I expected (just black vertical bars on both sides of the image). The same results I get with Dell (2560 x 1440 natively). So that seems to be OK. But it is not...

 

Whichever Full HD (1920 x 1080) monitor I plug to my board either does not recognize signal at all or outputs information something like: 'Not Optimum Mode Recommended Mode 1920x1080 60Hz' (however, when I read back 0x3D register from ADV7511 it responds with 0x10 which is exactly 1080p @ 60Hz)

 

So my guess was that I am unable to use any native resolution of any monitor/projector. I wanted to check that and I changed the resolution in my design to 720p (changes in vtc and vdma setup were applied). And it started working with monitors that previously were not working.

 

Personally I have run out of ideas why this is happening that is why I am asking you for help. Maybe someone has any clue?

 

Many thanks in advance!

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Explorer
Explorer
2,027 Views
Registered: ‎07-18-2011

@pjurgielewicz

The pixel clock for 1080p60 video is 148.5MHz (single-pixel or SDR) or 74.25MHz (dual-pixel or DDR).  Since you are using 75MHz for your VTC and ADV7511 clocks, it may be too far out of range to work (assuming the ADV7511 can indeed accept a DDR clock for 1080p60).

 

 

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Teacher
Teacher
1,683 Views
Registered: ‎06-16-2013

Hi @pjurgielewicz

 

Could you share your video timing (1080p and 720p) and video clock ?

I guess LG and Dell monitor have like frame buffer. It can accept any resolution. So that, they can display it.

 

Best regards,

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Registered: ‎07-25-2017

Hi @watari,

These are the clocks I use:

- 75 MHz for: VTC (clk), 'Axi Stream to Video Out' (vid_io_out_clk) and ADV_7511 clock 

- 100 MHz for: all VDMA interfaces

 

And this is the main tab of the VTC configuration (2nd I choose either 1080p or 720p, 3rd is default)

1.png

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Explorer
Explorer
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Registered: ‎07-18-2011

@pjurgielewicz

The pixel clock for 1080p60 video is 148.5MHz (single-pixel or SDR) or 74.25MHz (dual-pixel or DDR).  Since you are using 75MHz for your VTC and ADV7511 clocks, it may be too far out of range to work (assuming the ADV7511 can indeed accept a DDR clock for 1080p60).

 

 

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1,585 Views
Registered: ‎07-25-2017

@reaiken

I set VTC to 148.5MHz as you suggested and raised Microblaze and VDMA clock to 175 MHz. The results, however, are not 100% optimistic. Here I want to explain what is going on:

 

In Microblaze C++ code I am continuously generating debug gradient and I am seeing proper results - so this animation is ok. On the other hand when I start my IP (@275 MHz) in Auto Restart mode the screen is black but in single frame mode (without Auto Restart) I can see the picture.

 

My guess would be that there is something with VDMA configuration because I am able to see the animation created by Microblaze (sharing the same clock as VDMA).

 

help1.png

 

Do you have any suggestions how to solve it?

Many thanks in advance.

 

P.S. I am testing now on LG (2560 x 1080 natively)

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Moderator
Moderator
1,568 Views
Registered: ‎11-09-2015

HI @pjurgielewicz,

 

This is a different questions. Could you create a new topic for it? Then you can mark @reaiken reply as accepted solution.

 

This way, if other members are looking for answers, this is easier for them to find answers. And Reaiken can still get the accepted solution.

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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