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ldj
Contributor
Contributor
368 Views
Registered: ‎06-07-2020

An issue with the Dell p2418HT can only display 1280*800

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Dear all,

I hope all are doing great.

I connected the Dell p2418HT screen to ZU3EG's board by dp and found that the cursor was shifted to the left of the screen. The current resolution was only 1280 *800,60Hz.As shown in the figure below:

1223.png

./modetest -M xlnx

Encoders:
id crtc type possible crtcs possible clones
41 40 TMDS 0x00000001 0x00000000

Connectors:
id encoder status name size (mm) modes encoders
42 41 connected DP-1 530x300 21 41
modes:
name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
1280x800 60 1280 1352 1480 1680 800 803 809 831 83500 flags: nhsync, pvsync; type: driver
1280x720 60 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
1280x720 60 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
1280x720 60 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
1280x720 50 1280 1720 1760 1980 720 725 730 750 74250 flags: phsync, pvsync; type: driver
1024x768 75 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver
1024x768 60 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
800x600 75 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver
800x600 60 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
720x576 50 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
720x576 50 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver
720x480 60 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
720x480 60 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver
720x480 60 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
720x480 60 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
720x480 60 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver
640x480 75 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver
640x480 60 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
640x480 60 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
640x480 60 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
720x400 70 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver
props:
1 EDID:
flags: immutable blob
blobs:

value:
00ffffffffffff0010ac13414c373738
1b1e0104a5351e783eee95a3544c9926
0f5054a54b80714f81008180a9c0d1c0
010101010101023a801871382d40582c
45000f282100001e000000ff00505037
34363036553837374c0a000000fc0044
454c4c20503234313848540a000000fd
00324c1e5311000a2020202020200144
020318f14b900504030201111213141f
2309070783010000023a801871382d40
582c45000f282100001e011d8018711c
1620582c25000f282100009e011d0072
51d01e206e2855000f282100001e8c0a
d08a20e02d10103e96000f2821000018
00000000000000000000000000000000
000000000000000000000000000000cf
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
6 non-desktop:
flags: immutable range
values: 0 1
value: 0
4 TILE:
flags: immutable blob
blobs:

value:
20 CRTC_ID:
flags: object
value: 40
43 sync:
flags: range
values: 0 1
value: 0
44 bpc:
flags: enum
enums: 6BPC=6 8BPC=8 10BPC=10 12BPC=12
value: 8

CRTCs:
id fb pos size
40 46 (0,0) (1280x800)
1280x800 60 1280 1352 1480 1680 800 803 809 831 83500 flags: nhsync, pvsync; type: driver
props:
22 ACTIVE:
flags: range
values: 0 1
value: 1
23 MODE_ID:
flags: blob
blobs:

value:
2c46010000054805c805900600002003
230329033f0300003c00000006000000
40000000313238307838303000000000
00000000000000000000000000000000
00000000
19 OUT_FENCE_PTR:
flags: range
values: 0 18446744073709551615
value: 0
24 VRR_ENABLED:
flags: range
values: 0 1
value: 0
33 output_color:
flags: enum
enums: rgb=0 ycrcb444=1 ycrcb422=2 yonly=3
value: 0
34 bg_c0:
flags: range
values: 0 4095
value: 0
35 bg_c1:
flags: range
values: 0 4095
value: 0
36 bg_c2:
flags: range
values: 0 4095
value: 0

Planes:
id crtc fb CRTC x,y x,y gamma size possible crtcs
38 0 0 0,0 0,0 0 0x00000001
formats: VYUY UYVY YUYV YVYU YU16 YV16 YU24 YV24 NV16 NV61 GREY Y10 BG24 RG24 XB24 XR24 XB30 XR30 YU12 YV12 NV12 NV21 XV15 XV20
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
17 FB_ID:
flags: object
value: 0
18 IN_FENCE_FD:
flags: signed range
values: -1 2147483647
value: -1
20 CRTC_ID:
flags: object
value: 0
13 CRTC_X:
flags: signed range
values: -2147483648 2147483647
value: 0
14 CRTC_Y:
flags: signed range
values: -2147483648 2147483647
value: 0
15 CRTC_W:
flags: range
values: 0 2147483647
value: 0
16 CRTC_H:
flags: range
values: 0 2147483647
value: 0
9 SRC_X:
flags: range
values: 0 4294967295
value: 0
10 SRC_Y:
flags: range
values: 0 4294967295
value: 0
11 SRC_W:
flags: range
values: 0 4294967295
value: 0
12 SRC_H:
flags: range
values: 0 4294967295
value: 0
37 tpg:
flags: range
values: 0 1
value: 0
39 40 46 0,0 0,0 0 0x00000001
formats: AB24 AR24 RA24 BA24 BG24 RG24 RA15 BA15 RA12 BA12 RG16 BG16
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
17 FB_ID:
flags: object
value: 46
18 IN_FENCE_FD:
flags: signed range
values: -1 2147483647
value: -1
20 CRTC_ID:
flags: object
value: 40
13 CRTC_X:
flags: signed range
values: -2147483648 2147483647
value: 0
14 CRTC_Y:
flags: signed range
values: -2147483648 2147483647
value: 0
15 CRTC_W:
flags: range
values: 0 2147483647
value: 1280
16 CRTC_H:
flags: range
values: 0 2147483647
value: 800
9 SRC_X:
flags: range
values: 0 4294967295
value: 0
10 SRC_Y:
flags: range
values: 0 4294967295
value: 0
11 SRC_W:
flags: range
values: 0 4294967295
value: 83886080
12 SRC_H:
flags: range
values: 0 4294967295
value: 52428800
31 alpha:
flags: range
values: 0 255
value: 255
32 g_alpha_en:
flags: range
values: 0 1
value: 1

Frame buffers:
id size pitch

 

But I worked fine on a non-dell screen with 1920*1080,60Hz resolution.

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1 Solution

Accepted Solutions
florentw
Moderator
Moderator
280 Views
Registered: ‎11-09-2015

HI @ldj 

You need to make sure you have 2 lane enabled for the Displayport controller


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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4 Replies
florentw
Moderator
Moderator
343 Views
Registered: ‎11-09-2015

HI @ldj 

You might want to go through the following topic. It might help:

https://forums.xilinx.com/t5/Video-and-Audio/PS-DisplayPort-maximum-resolution-of-1024x768/td-p/1138881 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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ldj
Contributor
Contributor
299 Views
Registered: ‎06-07-2020

Hello @florentw,

    Thank you very much for your reply.

    Yes, I also think a lane speed of Dell's screen DP is 2.7 Gbps, and a lane speed of my board DP is 5.4 Gbps, so it cannot be displayed normally.What changes should I make if I want to use this dell screen?

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watari
Teacher
Teacher
294 Views
Registered: ‎06-16-2013

Hi @ldj 

 

Using two lane as 2.7 Gbps is best way to achieve what you want to do.

 

Best regards,

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florentw
Moderator
Moderator
281 Views
Registered: ‎11-09-2015

HI @ldj 

You need to make sure you have 2 lane enabled for the Displayport controller


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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