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Registered: ‎09-13-2019

Any IP or support available for RGB to gray scale conversion

Please provide information about XILINX IP supporting RGB to gray scale value with gamma factor 2.2

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florentw
Moderator
Moderator
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Registered: ‎11-09-2015

Hi devi2.ramachandran@aricent.com 

There is no IP but I guess you should be able to do it with some of the blocks of the Vision library:
https://xilinx.github.io/Vitis_Libraries/vision/2020.1/overview.html#vitis-vision-library-contents 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Nikhil_Thapa
Explorer
Explorer
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Registered: ‎05-28-2020

Hi devi2.ramachandran@aricent.com ,

I agree with @florentw.

You might consider creating custom HLS IP that might fulfill your requirements.

 

Regards,

nikhil@logictronix.com
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watari
Teacher
Teacher
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Registered: ‎06-16-2013

Hi devi2.ramachandran@aricent.com 

 

I guess you can achieve it, if you use VPSS CSC only IP and GAMMA IP.

Of cause you have to prepare proper factor in VPSS CSC and lut data as gamma curve is 2.2 in GAMMA.

Would you try it ?

 

Best regards,

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286 Views
Registered: ‎09-13-2019

Yes I have tried custom hls ip. It's working.  But facing dsp4e slices limit crossed than available. Trying to reduce that. Since complete process is pipeline in floating point rgb to grey scale conversion, taking more dsp slices in default 

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286 Views
Registered: ‎09-13-2019

Not yet. But I have checked this option. Let me check. Any idea about reducing dsp slices in hsl custom ip 

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reaiken
Explorer
Explorer
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Registered: ‎07-18-2011

devi2.ramachandran@aricent.com 

If you want to reduce DSP slice usage, you can do the RGB->Gray scale conversion using distributed logic fixed-coefficient multipliers.

Gray-scale conversion can be implemented by doing an RGB->YUV conversion matrix for only the Y path output.  

For example, for NTSC RGB to YUV  colorspace conversion:

Y = 0.2990*R + 0.5870*G + 0.1140*B
U = 0.7010*R - 0.5870*B - 0.1140*B
V = -0.2990*R - 0.5870*B + 0.8860*B

If you take only the Y equation, you will need three multipliers and an adder to sum the multiplier results.

Since the multiplier coefficients never change, you can use a fixed-coefficient multiplier instead of a full multiplier to reduce resource usage.  

Also, you don't need to do a floating-point multiply, since the input RGB data is only 8-bit fixed data.   If you scale the floating point coefficients to appropriate fixed-point numbers, you can use a fixed-point multiplier.

For example, using 9-bit format for the coefficients, the 0.2990 R multiplier coefficient is 153, the 0.587 G multiplier coefficient is 301, and the 0.114 B multiplier coefficient is 58.  These 9-bit coefficients should give sufficient resolution for 8-bit RGB colorspace conversion to monochrome.

Since each of the three multiplier outputs will be of different size (R = 16 bit, G = 17-bit, and B=14-bit) you will have to add them all to get a 17-bit result and truncate or round the result to use the upper 8-bits for the 8-bit monochrome output.   This can all be easily implemented in a custom Verilog or VHDL module, or you could implement it in HLS.

 

maps-mpls
Mentor
Mentor
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Registered: ‎06-20-2017

@reaiken Perfect answer!  And nice of you to take the time to share.

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