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Mentor
Mentor
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Registered: ‎06-09-2011

Can't file IP generated simulation files

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Hi all,

I am using Video-In-2AXI IP block in a design. I was reading the datasheet and wondering where those generated test bench files are? I refer to PG043  Video In to AXI4-Stream v4.0 :

FileLocation.JPG

I couldn't find any of the above mentioned files. I will appreciate any help.

 

Thanks,
Hossein
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Moderator
Moderator
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Registered: ‎11-09-2015

HI @embedded 

You need to find the correct timing information. One place you can look at is this page:

http://tinyvga.com/vga-timing

You can also find timings information in the Xilinx drivers (which can be used to program the VTC)
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/video_common/src/xvidc_timings_table.c

If you refer to the following, I am using the drivers to program the VTC (to support multiple resolutions):

Video Series 22: Supporting multiple video resolutions on ZC702 HDMI


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Moderator
Moderator
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Registered: ‎11-09-2015

Hi @embedded 

It seems that these files are not generated anymore. I will have the PG updated accordingly.

I wrote a blog article you can use as reference for a simulation design:

Video Beginner Series 2: From Native video to AXI4-Stream


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Mentor
Mentor
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Registered: ‎06-09-2011

Hi @florentw,

I have tried them. But, I am using Vivado 2019.2 and I do not see the same signaling and timing that you have mentioned in these series. Could you please mention some links that have enough information regarding Hsync, Vsync positions in a line and clock frequency for various video formats? As I am using almost a new Vivado version I have to initialize those cores myself. Therefor, need to know such information to initialize the core accordingly.

 

Thanks,
Hossein
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Highlighted
Moderator
Moderator
133 Views
Registered: ‎11-09-2015

HI @embedded 

You need to find the correct timing information. One place you can look at is this page:

http://tinyvga.com/vga-timing

You can also find timings information in the Xilinx drivers (which can be used to program the VTC)
https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/video_common/src/xvidc_timings_table.c

If you refer to the following, I am using the drivers to program the VTC (to support multiple resolutions):

Video Series 22: Supporting multiple video resolutions on ZC702 HDMI


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

0 Kudos