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dje666
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Registered: ‎04-21-2017

Channel count for Ultra Low Latency MPSoC-EV encode/decode solution

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Dear Forum,

I understand that the MPSoC-EV devices can encode/decode 8 x 1080p30 sources simultaneously. However, the Ultra-Low Latency solutions documented in the VCU-TRD reference designs, appear to be limited to 2 x 1080p60 sources.

What is the actual number of 1080p30 video streams that the ULL architecture can support? 2, 4 or 8....?

NB. I only need to encode or decode in the one chip, never both for this application.

Regards,

DJE666  

 

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florentw
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Registered: ‎11-09-2015

HI @dje666 

In 2020.1 you can now support up to 4 streams for encoding (still 2 for decoding) for Ultra Low Latency. This means that the architecture can support more.

However there are multiple dependencies (memory, resource utilisation, timing) thus it might be complicated to give a answer of the architecture can support. This is a full system so it has to be validated.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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1 Reply
florentw
Moderator
Moderator
158 Views
Registered: ‎11-09-2015

HI @dje666 

In 2020.1 you can now support up to 4 streams for encoding (still 2 for decoding) for Ultra Low Latency. This means that the architecture can support more.

However there are multiple dependencies (memory, resource utilisation, timing) thus it might be complicated to give a answer of the architecture can support. This is a full system so it has to be validated.


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post