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Yo0
Visitor
Visitor
543 Views
Registered: ‎07-22-2021

Clocking Wizard problem

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Hi all,

I'm a beginner of zynq field.

I met some problem when I'm run "Xilinx Video Beginner Series 1"  tutorial.

I run the simulation without board. The clocking wizard ip output only 1 wave.

Yo0_0-1626945940654.png

There is some question 

1. Does this problem cause of without board?

2. Could I do simulation without hardware?

Thanks for your reply

 

 

 

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1 Solution

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florentw
Moderator
Moderator
515 Views
Registered: ‎11-09-2015

HI @Yo0 

What I called the Xilinx Video Beginner Series (video series 1 to 18) do not require any HW. There are all exclusively done in simulation

In the Xilinx Video Series, it is mentioned to run the simulation for 50ms.

If you check the first screenshot with the waveforms you can clearly see that the clock is not up beofre 1us:

florentw_0-1626948642790.png

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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8 Replies
joancab
Teacher
Teacher
536 Views
Registered: ‎05-11-2015

Yes, you don't need any hardware to run simulations.

If you can't see the waveforms you expect, there is a '+' button to the top left corner (of the waveform window) to add other signals to it.

Also, in the simulation layout, you can drag'n'drop signals from the design (left side). You may need to relaunch the simulation after adding signals

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bruce_karaffa
Scholar
Scholar
534 Views
Registered: ‎06-21-2017

The Clock Wizard, or more accurately the MMCM instantiated by the clock wizard requires several microseconds to lock.  You need to do two things.  Supply a reset to the clock wizard at the beginning of the simulation while the input clock is running.  Make the reset several input clock cycles long.  Simulate longer.  I don't have the data sheet in front of me but try simulating for 100 uS. 

joancab
Teacher
Teacher
522 Views
Registered: ‎05-11-2015

A few ms, I think.

florentw
Moderator
Moderator
516 Views
Registered: ‎11-09-2015

HI @Yo0 

What I called the Xilinx Video Beginner Series (video series 1 to 18) do not require any HW. There are all exclusively done in simulation

In the Xilinx Video Series, it is mentioned to run the simulation for 50ms.

If you check the first screenshot with the waveforms you can clearly see that the clock is not up beofre 1us:

florentw_0-1626948642790.png

 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

dpaul24
Scholar
Scholar
488 Views
Registered: ‎08-07-2014

@joancab ,

A few mSec is too much. It would indicate a badly designed MMCM/PLL macro or some other problem.

Of all Xilinx MMCM/PLL I have owrked with, the locked signal goes high after a few uSec. This is the expected time.

------------FPGA enthusiast------------
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joancab
Teacher
Teacher
453 Views
Registered: ‎05-11-2015

@dpaul24 From the top of my crammed head. Agree that 1 ms is a lot. Maybe I'm just confused with the units prefix. But if ran for some ms it will surely come up or else most probably the problem is a different one.

dpaul24
Scholar
Scholar
447 Views
Registered: ‎08-07-2014

@joancab ,

For someone who is used to functional verification using simulation, a msec is a long time. If I do not see the locked asserted before 10 us of simu run time, that would ring alarm bells!

But if ran for some ms it will surely come up or else most probably the problem is a different one.

Yes correct. The OP was just not carefully following all the instructions of that Video tutorial.

------------FPGA enthusiast------------
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Yo0
Visitor
Visitor
357 Views
Registered: ‎07-22-2021

The problem has fixed.I have never thought MMCM and PLL IP need such long time until stable.

Thanks for everyone.

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