cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
auricm
Explorer
Explorer
644 Views
Registered: ‎06-13-2012

Display port tx multiple istance

Jump to solution

Hi all,

 

I'm designing a system over a XCKU035 FPGA, I set two displayport tx subsystem in two different quad, the first istance is working properly, the second istance seems to ignore the hot plug so no video is displayed on monitor.
Both subsystems are connected to each PHY and to the same microblaze processor, the software initialization is the same for both channels (obviously they are mapped on different address). I check with oscilloscope and I see the hot plug rise and fall as I plug or unplug the monitor, same thing I see usign an ILA inside the block, in the same ILA I connected the irq of the tx subsystem and it never rises as I plug or unplug the monitor. I've enabled the interrupts on both subsystems.

So I can't find where the problem comes as both have the same initialization, I'm missing something?

Regards

0 Kudos
Reply
1 Solution

Accepted Solutions
auricm
Explorer
Explorer
562 Views
Registered: ‎06-13-2012

Hi all,

 

I found that during the the instantiation of the new block I forgot to check the last 19 bit of the address page 73 of PG199. 

Now everithing is working properly, thank you for your support

Best Regards

View solution in original post

4 Replies
watari
Teacher
Teacher
622 Views
Registered: ‎06-16-2013

Hi @auricm 

 

Would you make sure IRQ signal and behaviour ?

 

Also, how many microblazes do you implement ?

And, what verstion do you use ?

 

In my experience, I encounter some IRQ issue with around 2018.1.

So, I guess that the best way is that each microblaze control each DP Tx by causing IRQ issue.

 

Best regards,

auricm
Explorer
Explorer
605 Views
Registered: ‎06-13-2012

Hi @watari ,

 

Thanks for the answer, the irq signal coming from the displayport tx subsystem is always low, I use a single microblaze to control both displayport tx, Microblaze version 10.0, Vivado 2018.2.

Regards

0 Kudos
Reply
florentw
Moderator
Moderator
584 Views
Registered: ‎11-09-2015

Hi @auricm 

Did you try with a design with only the "non-working" instance? Is it working? I would like to make sure everything is working correctly on the HW.

Something you might want to do is to enable the DEBUG information in the log. See if you are getting more information.

I assumed you have already checked the register values for both the VPHY and Displayport IP to see if you can see anything wrong?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
auricm
Explorer
Explorer
563 Views
Registered: ‎06-13-2012

Hi all,

 

I found that during the the instantiation of the new block I forgot to check the last 19 bit of the address page 73 of PG199. 

Now everithing is working properly, thank you for your support

Best Regards

View solution in original post