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Registered: ‎03-03-2017

DisplayPort AUX differential signaling

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Hi, I am using Vivado/SDK 2018.1 on a custom hardware Kintex-7 project which implements a DisplayPort RX design which I copied over using the Xilinx DisplayPort example design.   We recently did a hardware revision and accidentally sent the AUXP/N pins to a 3.3V bank (bank 13 HR bank on a xc7k160tffg676-1 device) whereas before it was a 2.5V bank we went into and used the LVDS_25 IOSTANDARD for the pins.   Now that I am going into a 3.3V bank I can no longer use the LVDS_25.

 

Does somebody know if I can possibly use a different IOSTANDARD for the differential signaling for this pin pair which will work in a 3.3V bank?   Fortunately this is a 1MHz signal and a fairly large swing (though I don't know what the exact swing is currently).

 

Thanks.

Tim

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Scholar
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2,799 Views
Registered: ‎11-09-2013

Differential OUT primitives switche its Output Drivers HARD OFF when VCCIO comparator is above 2.65V

 

So while you can use DIFF Input, as soon VCCIO rises above 2.65V all DIFF Outputs in that bank TURN OFF. This is a protection Feature and can not be turned off by any soft Settings.

 

you can get sort of diff Output when you use TMDS_33 and some specially designer resistor Network. But all normal diff out primitives will shut down.

 

So you Need to fix your PCB!

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Teacher
Teacher
2,574 Views
Registered: ‎06-16-2013

Hi @tim_severance

 

Here is specification form VESA DisplayPort Specification.

Would you refer them ?

 

Vaux_diffp-p (Rx) = 0.32 ~ 1.36[V]

Vaux_term_r = 100[ohm] (typ)

Vaux_dc_cm = 0~2[V]

 

BTW, I don't know your PCB.

However I guess you might be able to use LVDS_18 with AC coupling or pseud LVDS_33 (but not recommend).

 

https://www.xilinx.com/support/answers/43989.html

 

My best solution is to use LVDS_25 as AUX port of DisplayPort...

 

Best regards,

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Registered: ‎01-22-2015

Hi Tim,

 

ug471, pg92 says " It is acceptable to have differential inputs such as LVDS and LVDS_25 in I/O banks that are powered at voltage levels other than the nominal voltages required for the outputs of those standards (1.8V for LVDS outputs, and 2.5V for LVDS_25 outputs). "   -but there are some criteria to be met, which are then listed on ug471 pgs 92-93.

 

The Kintex-7 datasheet (ds182, pg11) says something similar below Table 12. 

 

Cheers,

Mark

 

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Registered: ‎03-03-2017

markg@prosensing.com / @watari,

   I see on page 100 of UG471 (see image below) that TMDS_33 should work on a 3.3V bank.   I think I will try using this for my AUX RX channel which I am thinking will work since we are AC coupled between the DP_TX and DP_RX.

tmds.png

 

Do either of you have any reason to think for sure that this would not work?

 

Thanks.

Tim

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Registered: ‎03-03-2017

Never mind, I see TMDS is not bi-directional:

tmds1.png

Tim

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Registered: ‎03-03-2017

markg@prosensing.com / @watari,

   I see on the Xilinx page AR# 43989 that you can use LVDS_25 in a 3.3V bank (unless I am reading it wrong).

   Do you know how I can do this and get implementation to pass without giving me an error?

Thanks.

Tim

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @tim_severance

 

I already mentioned about AR #43989 before my post...

 

If you want to know whether your solution is suitable or not, I suggest to make sure spec of DP source device.

 

Best regards,

 

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Registered: ‎03-03-2017

@watari,

   Thanks.

   I setup another post HERE regarding trying to setup LVDS_25 in a 3.3V bank and it is not working according to how it should even in a very simple 3 pin dummy design.

Tim

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @tim_severance

 

I'm very confused.

 

Which do you want to resolve lvds_25 at VCC as 3.3[V], input side (Rx) or output side (Tx) ?

 

Your two posts are inconsistent.

If you want to know how to resolve this post, I suggest to make sure DC spec of source device, first.

If the spec is clear, you can find the solution in AR #43989.

 

Best regards,

 

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Registered: ‎03-03-2017

@watari,

   Sorry if the posts are confusing.

   Since I am connecting to DisplayPort AUX it has to be bidirectional which requires using LVDS_25.   My small example design in the other post used unidirectional just as an example, not to match exactly what I need.

   So yes, I need bidirectional.

Tim

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2,237 Views
Registered: ‎06-16-2013

Hi @tim_severance

 

I see.

I already shared DC spec of DisplayPort AUX. Of cause AUX is bidirectional lvds.

(in this case, key point is how to satisfy criteria for receiver.)

 

In your case, I recommend to make sure dc spec of your DisplayPort Tx, first, if your environment is limitation.

After that, if your criteria is clear, you can find your solution in AR #43989.

 

If your criteria is same as specification of DisplayPort (maybe this), I suggest to adjust amplitude of this line by measuring or do doing simulation and try it on your PCB.

 

Best regards,

 

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Registered: ‎03-03-2017

@watari,

   Understood.

   The DP Tx we are connecting is *very* flexible in amplitude, and is DC coupled so the DC level is not so important.

   I am simply trying to get past the Vivado error "DRC BIVC-1" or "PLACE 30-374" if I tell Vivado to ignore the BIVC-1 DRC.   Once I can at least get the design to implement I can then verify the signal throughput.   That is my main goal of this thread, to simply get implementation to pass with this setup.

 

Thanks.

Tim

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Registered: ‎11-09-2015

Hi @tim_severance,

 

It seems that you were able to move forward on this using @watari and markg@prosensing.com replies.

 

What is you current status on this?

 

If this is fixed for you, could you kindly mark the reply that helped you as accepted solution. Else could you update the topic?

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Scholar
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Registered: ‎11-09-2013

Differential OUT primitives switche its Output Drivers HARD OFF when VCCIO comparator is above 2.65V

 

So while you can use DIFF Input, as soon VCCIO rises above 2.65V all DIFF Outputs in that bank TURN OFF. This is a protection Feature and can not be turned off by any soft Settings.

 

you can get sort of diff Output when you use TMDS_33 and some specially designer resistor Network. But all normal diff out primitives will shut down.

 

So you Need to fix your PCB!

View solution in original post

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2,134 Views
Registered: ‎03-03-2017

@trenz-al,

   Thanks for the detailed explanation on why it won’t work.  

Tim

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