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Visitor
Visitor
5,954 Views
Registered: ‎09-24-2018

Error - streaming 4k display zcu104

I am trying to stream a test pattern with resolution (3840 * 2160) - 4k using the reVISION stack zcu104 2018.2 prebuilt binaries(BOOT.bin and image.ub) . Unable to stream a test pattern of this resolution using the vmix and hdmi pl blocks provided. Is there any restrictions to stream 4k ??

 

The command i am using ,

 

gst-launch-1.0 videotestsrc pattern=13 num-buffers=-1 ! "video/x-raw,format=UYVY,width=3840,height=2160,framerate=30/1" ! fpsdisplaysink video-sink="kmssink plane-id=31 bus-id=b00c0000.v_mix fullscreen-overlay=true" sync=false text-overlay=false

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Visitor
Visitor
375 Views
Registered: ‎10-25-2018

Hi @xud and @florentw,

We have tried with a new and different cable which is HDMI 2.0 compliant with bandwidth upto 18gbps. Link : https://www.amazon.in/HC000008-HDM-BLK-HDMI-Ethernet/dp/B07G5HV32G

Part Number : HC000008/HDM/2M/BLK/SLM

We still cannot get 4k@60 fps using example design. The link quality is shown as excellent in the logs. But we get no preview. I have shared the log files as well.

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Xilinx Employee
Xilinx Employee
365 Views
Registered: ‎08-02-2007

@dilipkumar25

I think the HDMI cable is okay, can you use ZCU102 board to display the EDID of your sink?

When resolution is 1080p60 or 4kp30, can you get EDID?

I suspect there might be a problem with I2C(DDC) interface : ddc_scl and ddc_sda

Do you have I2C analyzer to monitor the event on this interface?

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Xilinx Employee
Xilinx Employee
347 Views
Registered: ‎08-02-2007

@dilipkumar25

I have found your EDID info from your 4kp30 log. Can you also upload the log file when you successfully see 4kp60 video on ZCU102 board?

Other than I2C, can you add ILA to the output of TPG, lock signal of HDMI TX SS IP and see if you can see valid video data coming from TPG, and lock is asserted?

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