08-03-2020 04:32 AM
I am currently compiling Zynq Ultrascale+ PL DDR HDMI Capture and Display in Vivado2019.2.
The GTH bank used for HDMI RX/TX is placed on BANK226 and clock is coming from BANK 225(from the two upper quad GTH via GTSOUTHREFCLK) . It seems that according to lack of resources for GTSOUTHREFCLK, they have used CLOCK_DEDICATED_ROUTE to bypass any clock error and then commented #SI570 - OUT OF SPEC CLOCK SOURCE LOCATION - DO NOT USE FOR PRODUCTION DESIGNS. So, I am wondering how I could solve this issue? whther I can connect a ref clock to BANK 224 and use it as GTSOUTHREFCLK?
08-10-2020 10:33 AM
Hi Hossein (@embedded),
Your question is really for the GT configuration.
The HDMI core does not require location constraints outside of what the GT uses.
For the GT reference clock location constraints for GTY see UG578 page 36.
As far as the design is concerned, you are correct. The SI570 should be set to a clock capable pin and without looking at the design I believe the pin used is not a CC pin. While this can work, it makes it harder to produce a clean design. For more information see Avrumws response in this thread.
08-19-2020 09:43 AM