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Visitor
Visitor
601 Views
Registered: ‎10-10-2017

HDMI / AXI-S / transceiver interfacing

I'm trying to implement an HDMI-to-GTX converter using a ZC706 board with an Inrevium FMC for the HDMI interface.  A second copy of this is to receive the GTX and convert back to an HDMI source.  Video at 4k 30p should be possible through a single 12.5 Gb/s link (including blanking, 8b/10b overhead, etc.).  PG235 seems like the ideal starting point, and I have that working at 4k video.  So all I need is to interface the AXI-S from the HDMI-Rx to a GTX-Tx, and on the other end interfacing the GTX-Rx to the AXI-S going into the HDMI-Tx.

Does that sound right?  Is there some example design that connects HDMI directly to a transceiver?  If not, should I be looking at Aurora to do this connection, or is that overkill?  Or do I just attempt to hook up the ports between the HDMI AXI-S interfaces and the GTXs myself?

Thx!

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4 Replies
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Moderator
Moderator
497 Views
Registered: ‎08-01-2007

What are you trying to do? Xilinx HDMI solution is comprised of HDMI TX/RX Subsystem IP + Video PHY Controller. The Video PHY controller is a GT. HDMI Receiver is to use Video PHY Controller to receive HDMI input, the Video PHY Controller then send its output to HDMI RX Subsystem IP, the HDMI RX Subsystem IP outputs video on native interface or AXI-4 stream interface.

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Adventurer
Adventurer
448 Views
Registered: ‎12-27-2018

Hi,

HDMI passthrough example design should work for you. See PG235.

 

 

Best regards.

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Visitor
Visitor
428 Views
Registered: ‎10-10-2017

Hi nathanx, thanks for responding.


@nathanx wrote:

What are you trying to do?


I'm trying to implement an HDMI-to-GTX converter:

  • In one direction, receive HDMI (using the Xilinx IP for HDMI-PHY and HDMI-Rx Subsystem) and output this on a single GTX
  • In the other direction receive on a single GTX and output on HDMI (using the HDMI-PHY and HDMI-Tx Subsystem)  

Things to note:

  • HDMI uses four GTXs (one clock pair and three data pairs)
  • 4k 30p video with 10 bits per color per pixel is 11.1375 Gb/s (including blanking and 8b10b overhead), so a single GTX should be adequate.
  • The format of the single 11-Gb/s GTX is up to me

What you've described is the Example design that comes with PG235, without the conversion to and from a single GTX.  I built the example and it works.

I believe that now I need to interface the AXI-4 stream provided in the example to the single GTX.  I'm thinking this could be done either by:

  • Finding an example design that already does this
  • Using Aurora to connect AXI4-S to GTX
  • Wiring the AXI4-S directly to the GTX
  • Some better way?

I have a fair amount of FPGA experience, but haven't used AXI or transceivers, so would appreciate any perspective on which of these four I should be pursuing.

Thanks again!

 

 

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Teacher
Teacher
384 Views
Registered: ‎06-16-2013

Hi @patwalp 

 

How do you recover pixel clock from one GTX ?

If you don't have any idea, I suggest you to learn DisplayPort.

 

Your concept is similar to DisplayPort and it's HDMI to DP bridge IC.

 

Best regards,