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Explorer
Explorer
1,506 Views
Registered: ‎05-04-2014

HDMI GTX pin swap

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Hi,

 

 Our original HW design is (HDMI data0  p/n-> FPGA Rx0 p/n , HDMI data1  p/n-> FPGA Rx1 p/n , HDMI data2  p/n-> FPGA Rx2 p/n), but they want to modify it.

 

Is it impossible to swap GTX pin for video phy? There are two examples as following:

 

E.g. 1:

HDMI data0  p/n-> FPGA Rx3 p/n

HDMI data1  p/n-> FPGA Rx2 p/n

HDMI data2  p/n-> FPGA Rx1 p/n

 

E.g. 2:

HDMI data0  p/n-> FPGA Rx2 p/n

HDMI data1  p/n-> FPGA Rx0 p/n

HDMI data2  p/n-> FPGA Rx1 p/n

 

BR,

Sitting

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Xilinx Employee
Xilinx Employee
1,855 Views
Registered: ‎08-01-2007

Yes, it is possible to change the GTs.  In order to do this, you will need to add constraints at the top level that will lock the p/n pairs to the correct GT for your board layout.

 

It is also possible to change invert the p/n pair using the RX Control (0x0100) and TX Control Registers (0x0070) as documented in the Video PHY Controller Product Guide PG230.

Chris
Versal ACAP: AI Engines | Embedded SW Support

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Xilinx Employee
Xilinx Employee
1,856 Views
Registered: ‎08-01-2007

Yes, it is possible to change the GTs.  In order to do this, you will need to add constraints at the top level that will lock the p/n pairs to the correct GT for your board layout.

 

It is also possible to change invert the p/n pair using the RX Control (0x0100) and TX Control Registers (0x0070) as documented in the Video PHY Controller Product Guide PG230.

Chris
Versal ACAP: AI Engines | Embedded SW Support

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Don’t forget to Reply, Kudo, and Accept as Solution.
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View solution in original post

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Explorer
Explorer
1,452 Views
Registered: ‎05-04-2014

Hi @chrisar,

 

Thanks for your help. I have another problem. Is it possible to inverse GT clock P/N pair too? Do I need to modify source code?

 

 

 

BR,

Sitting

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Xilinx Employee
Xilinx Employee
1,440 Views
Registered: ‎08-01-2007

It is also possible to change invert the p/n pair using the RX Control (0x0100) and TX Control Registers (0x0070) as documented in the Video PHY Controller Product Guide PG230.  No RTL code changes, just update the register values.  This only works if the GT (GTX, GTH, GTY, etc.) supports this.  Most do, but you should look at the documentation for the GT you device.

Chris
Versal ACAP: AI Engines | Embedded SW Support

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Explorer
Explorer
1,434 Views
Registered: ‎05-04-2014

Hi @chrisar,

 

In PG230, it mentioned RX/TX data pin could inverse, but it didn't mention GT reference clock could inverse. I am confused.

 

BR,

Sitting

 

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