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Visitor
Visitor
557 Views
Registered: ‎07-29-2020

HDMI receiver at lower resolution zybo z7 10

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I'm searching for a way in which i can receive a video signal from the HDMI in my zybo z7 10.

I come up using the dvi2rgb ip core and it seems it works.
The problem is that in the configurations of the ip core i can only set
1920*1080
1280*720
1280*1024
any way for configuring it at a lower resolution?
like 800*600, 640*480 or the resolution i'm aiming for: 640*360.

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Highlighted
Visitor
Visitor
182 Views
Registered: ‎07-29-2020

Finally resolver.
Yes you are right but 640x480 is still possible according to the documentations that I read, in fact I'm finally succeeded in having 640x480 input in the hdmi of the zybo.
I had to create a custom edid by myself with AW EDID editor found here https://www.analogway.com/emea/products/software-tools/aw-edid-editor/

 

The EDID that I've just created has the VGA standard parameters (25.175 mhz, 16h front porch...)
The EDID created that is finally working is this:

 

Spoiler
00000000
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00000100
00100001
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000000
00000001
00000011
10000000
00010000
00001100
00000000
00011010
00011110
10101100
10011000
01011001
01010110
10000101
00101000
00101001
01010010
01010111
00100000
00000000
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
11010101
00001001
10000000
10100000
00100000
11100000
00101101
00010000
00010000
01100000
10100010
00000000
11111010
10111110
00000000
00000000
00000000
00011000
00000000
00000000
00000000
00010000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
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00010000
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00010000
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14 Replies
Highlighted
Scholar
Scholar
552 Views
Registered: ‎08-07-2014

@centos_79,

The IP interface provides with the options you have mentioned. So using the GUI, not possible.

But if the IP is not encrypted and you are familiar with dvi2rgb signal conversion, then go on hacking the RTL for your custom resolution.

------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem

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Highlighted
Visitor
Visitor
541 Views
Registered: ‎07-29-2020

not really, and especially i'm not so capable of vhdl design (i'm using hls for pretty much everything).
So i was looking for something "pre implemented".

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Highlighted
Moderator
Moderator
483 Views
Registered: ‎04-09-2019

Hello @centos_79 ,

to generate a custom video timing, you can refer the VTC (Video Timing Controller) IP. using this IP as "generator mode" you can generate the resolution as your wish. But, you should aware of the exact video timing details of the particular resolution to generate the video timing signals in the output.

Kind Regards,

Ashok.

 

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Highlighted
Visitor
Visitor
462 Views
Registered: ‎07-29-2020

ok but how can I use that timing controller in the dvi2rgb ip core for adapting the hdmi to the resolution i want to use?

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Highlighted
Scholar
Scholar
454 Views
Registered: ‎08-07-2014

@centos_79,

not really, and especially i'm not so capable of vhdl design (i'm using hls for pretty much everything).

Sorry to say but then that's a handicap if you want to do custom hardware design stuff.....whether it is xilinx IP core or Digilent IP core.

Good luck in searching  if the HLS version of such a core is available for free!

------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem

Highlighted
Teacher
Teacher
440 Views
Registered: ‎06-16-2013

Hi @centos_79 

 

Did you try to calculate video timing by VESA GTF or use CEA video timing ?

If no, would you try it ?

 

Best regards,

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Highlighted
Moderator
Moderator
382 Views
Registered: ‎11-21-2018

Hi @centos_79 

Any updates on this? If this issue is resolved, could you mark the answer as 'accepted solution' so the community can find it faster? If not, can you update with details? 

Aoife
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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Highlighted
Participant
Participant
356 Views
Registered: ‎05-28-2020

Hi @centos_79 ,

To fulfill your requirement, I would recommend you to use Video Processing Subsystem IP. It will save your time a lot. This IP has numerous useful features for video processing, which will also help you for future video processing stuff. On the other hand, you can customize this IP to get different output resolutions of your choice. You can visit its product guide UG231. You can also visit its Video Series 29 tutorial. I strongly advise to follow this tutorial. You will certainly find the way you need. 

I would also recommend to have these basic things before going through video series. You need to have knowledge of video timing and video pixel clock.

For video timing, there is Video Timing Controller IP. This IP can be customized either detector mode or generator mode or both mode. For your requirement, this IP must generate video timing according selected output video resolution. You can follow this IP product guide for more information. And another thing you have to know is the different video resolutions have their definite pixel clock frequency. You can use clock generator IP such as Clocking Wizard IP. You can customize this IP to get pixel clock frequency corresponding to selected output resolution.

For more clarity, you can take this example, if you want 640x480 output resolution. You need to customize video timing controller to generate video timing related to that output resolution. And you have to customize Clocking Wizard IP to get 25.175MHz pixel clock frequency.

On the contrary, if you want dynamic output resolution, you have to enable AXI_LITE interface in video timing controller IP so that you will be able to generate video timing through programming. And you need to also enable Dynamic Reconfiguration mode in Clocking wizard IP so that you will be able to generate definite pixel clock frequency for definite video resolution from SDK programming. 

Finally, all these sort of things you will find in Video Series 29. Now, it's time to explore yourself.

 

Highlighted
Visitor
Visitor
262 Views
Registered: ‎07-29-2020

I'll make a general reply.
Everyone are proposing solution for having an output resolution of 640x480 but my problem is how to have the INPUT from the hdmi rx port at that resolution.
I had correctly managed some hls cores for having an output of 640x480 but the input source was taken by the ethernet ip stream or by bitmap images stored in the SD card.
Now my problem is how to get a HDMI interface compatible with 640x480.

PS: I read the PDF documentation of Video Processing Subsystem IP but I think is not the point.
There is no feature that allow to take input resolution from the HDMI at required resolution.
The solution that I could use is to take input resolution at 720p with the rgb2dvi ip core and use some functions of the Video Processing Subsystem IP to get it scaled down but I think is an ugly solution.

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Highlighted
Visitor
Visitor
260 Views
Registered: ‎07-29-2020
Spoiler
Sorry I don't get it...if I calculate the video timing for VGA video signal, how I manage to get the dvi2rgb ip core working with that resolution? I also have to manage the protocol used in the DDC right?
Honestly I think this is so much effort for a "standard problem".
Am I the first person who needs to use VGA resolution in the Zybo z7?
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Highlighted
Visitor
Visitor
209 Views
Registered: ‎07-29-2020

Hello I managed with EDID data to change the default resolution the IP-cores accept input video.
I found in this web page: https://edid.tv tons of EDID data.
I took the EDID data of various monitors and I come up with a working dvi2rgb 720x480p 60hz ip core.
The EDID that I used is this:

Spoiler
00000000
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00000110
10001111
00010010
10110000
00000001
00000000
00000000
00000000
00001100
00010100
00000001
00000011
10000000
00011100
00010101
01111000
00001010
00011110
10101100
10011000
01011001
01010110
10000101
00101000
00101001
01010010
01010111
00100000
00000000
00000000
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
00000001
10001100
00001010
11010000
10001010
00100000
11100000
00101101
00010000
00010000
00111110
10010110
00000000
11111010
10111110
00000000
00000000
00000000
00011000
11010101
00001001
10000000
10100000
00100000
11100000
00101101
00010000
00010000
01100000
10100010
00000000
11111010
10111110
00000000
00000000
00000000
00011000
00000000
00000000
00000000
11111100
00000000
01010110
01000001
00101101
00110001
00111000
00110011
00110001
00001010
00100000
00100000
00100000
00100000
00100000
00000000
00000000
00000000
11111101
00000000
00010111
00111101
00001101
00101110
00010001
00000000
00001010
00100000
00100000
00100000
00100000
00100000
00100000
00000001
11111010

However I have problems if I use a EDID that describe a 640x480 resolution: in this case windows is correctly identifying 640x480 monitor, but the HDMI output of the zybo is not transmitting any video.

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Highlighted
Participant
Participant
208 Views
Registered: ‎05-28-2020

Hi @centos_79,

If you want to take 640x480 resolution at input, then your source must send the video stream at that resolution. And other thing is, taking only that resolution does not work. Your rest of the design cannot detect that incoming stream resolution. You must have video timing controller IP in detection mode. This IP gets the video timing, including video resolution. This value must be used for further processing, then your design might work.

On the other hand, in case of DVI2RGB IP, it can only take HDMI signal and you cannot exactly set the video resolution value what you are looking for. You need to choose one of available standard resolution value. And this resolution value means that you will be able to take input stream up to that resolution. You cannot go beyond that. For example, if you set the resolution 1280x720 in DVI2RGB IP, then you will be able to take any video resolution up to this resolution. Any video resolution, below this resolution can be taken.

If you want to take 640x480 resolution stream, then you can simply set any of available resolution value in DVI2RGB IP. You also need to set clock range. And as I already mentioned, you need Video Timing Controller IP in detector mode. For more information, you can visit DVI2RGB product guide.

Highlighted
Scholar
Scholar
196 Views
Registered: ‎08-07-2014

@centos_79 ,

I see that you are on this thread again.

I should have mentioned this earlier.....HDMI is not supposed to do 640x480 resolution, it is build for much higher resolutions starting from 720p. That is why you don't get the resolution setting on the IP cores you want to use.

 

------------FPGA enthusiast------------
Consider giving "Kudos" if you like my answer. Please mark my post "Accept as solution" if my answer has solved your problem

Highlighted
Visitor
Visitor
183 Views
Registered: ‎07-29-2020

Finally resolver.
Yes you are right but 640x480 is still possible according to the documentations that I read, in fact I'm finally succeeded in having 640x480 input in the hdmi of the zybo.
I had to create a custom edid by myself with AW EDID editor found here https://www.analogway.com/emea/products/software-tools/aw-edid-editor/

 

The EDID that I've just created has the VGA standard parameters (25.175 mhz, 16h front porch...)
The EDID created that is finally working is this:

 

Spoiler
00000000
11111111
11111111
11111111
11111111
11111111
11111111
00000000
00000100
00100001
00000000
00000000
00000000
00000000
00000000
00000000
00000001
00000000
00000001
00000011
10000000
00010000
00001100
00000000
00011010
00011110
10101100
10011000
01011001
01010110
10000101
00101000
00101001
01010010
01010111
00100000
00000000
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
00000001
00000000
11010101
00001001
10000000
10100000
00100000
11100000
00101101
00010000
00010000
01100000
10100010
00000000
11111010
10111110
00000000
00000000
00000000
00011000
00000000
00000000
00000000
00010000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
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00010000
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00010000
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00000000
00000000
00000000
00000000

 

 

View solution in original post

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