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Observer
Observer
2,577 Views
Registered: ‎05-12-2012

Hardware Co-Simulation error : INTERNAL_ERROR:Xst:cmain.c:3422:1.27 ?

Hi,

I am using system generator to do Hardware Co-Simulation of my projects . I have to add to my project the  IP Divider Generator v3.0. So I start at first by testing the Ip core   (Divider Generator v3.0) alone with hardware Co-Simulation and it works.
After that, I added the ip core to my project but in Hardware Co-Simulation I get an error in the  Synthesis process  :  

Loading core <dvider> for timing and area information for instance <Div>.
INTERNAL_ERROR:Xst:cmain.c:3422:1.27 -  Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support.  


But  when I work with ISE Project Navigator (without System generator ), I don't get this Synthesis  error.

 

Thanks

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Xilinx Employee
Xilinx Employee
2,521 Views
Registered: ‎02-11-2010

Re: Hardware Co-Simulation error : INTERNAL_ERROR:Xst:cmain.c:3422:1.27 ?

There may be different synthesis options used when running Sysgen as opposed to running from project navigator. You could check the synthesis reports.

 

What version of Sysgen/ISE are you using?

 

If possible, opening a webcase may help triage this further.

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