cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
foos0016
Observer
Observer
8,812 Views
Registered: ‎10-30-2007

Hardware Cosim has zero output

Hi all,
 
I have a certain design ready to run on ML501 hardware cosim and I have generated the JTAG hardware cosim block, connected n ready to run through Platform Cable USB.
 
However, I have opt to check 'skip device config' within the HW cosim block which if left unchecked can cause runtime error pointing to the cable setup so I used iMPACT to initialize chain instead.
 
However my problem is there is no output from my HW cosim block after simulation is run. Can some one help me with that?
 
Thank You
0 Kudos
4 Replies
jbass
Xilinx Employee
Xilinx Employee
8,802 Views
Registered: ‎08-02-2007

What does the runtime error say when you try to program via System Generator for DSP?

When you program via iMPACT, does verify come back good?

Try decreasing your CCLK frequency in System Generator for DSP.
0 Kudos
foos0016
Observer
Observer
8,772 Views
Registered: ‎10-30-2007

Hi, Thanks for the suggestion, I have solved it separetely, seems the error was I initialized the position of the FPGA in the device chain wrongly when I target new compilation target for hardware cosim.
 
Regards
 
0 Kudos
nemo0003
Newbie
Newbie
8,647 Views
Registered: ‎04-11-2008

Hi all,
 
    I'm quite new in this topic, but I'd like to design some blocks using Xilinx System Generator together with Simulink and Hardware-co simulation online debugger. I found some ready-prepared config files for ML506 and ML402 (compact flash solution) to do it using ethernet co-simulation but I didn't find any configs for such a board like ML501. As far as I understand, You are using JTAG hardware cosim block for ML501, how to create it?, Did You find some tutors for this co-sim way?
 
Thank You
0 Kudos
jeffreyh
Xilinx Employee
Xilinx Employee
8,638 Views
Registered: ‎08-07-2007

The System Generator user guide explains how to add support for new JTAG co-sim boards.  Take a look at the section titled  "Supporting new platforms through JTAG Hardware Co-Simulation" uder "Using Hardware Co-Simulation".
0 Kudos