I wanted to use a Xilinx FPGA to run it through a FFT and I noticed
that Xilinx has a FFT ipcore available in their CORE Generator that I
believe I can use. The input requires a real part and an imaginary
part, but I only have the real part [the data coming off the ADC]. So I decided to use a Hilbert Transformer to take the data from the ADC and turn it into the required real and imaginary parts for the FFT. But when I create the Hilbert Transformer in CORE Generator, the output for the Q part is [34:0] while the output for the I part is [15:0]. The docs have this to say:
Filter input data is supplied on the DIN port (N bits wide) and filter
output samples are presented on the DOUT port (R bits wide). The
output width R is the sum of the data bit width N, the coefficient bit
width K, and the bit growth due to the number of coefficients.
... For Hilbert transform filter implementations, a pair of
In-Phase/Quadrature data outputs is provided. The In-Phase data output
is N bits wide, as it is a delayed version of the input data, while the
Quadrature data output is R bits wide, calculated as described
But the input for the FFT that I create in CORE Generator is [15:0] for both the I and Q parts. So how can I connect the output of the Hilbert Transformer to the input of the FFT?