cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Visitor
Visitor
287 Views
Registered: ‎02-27-2020

How to build an image acquisition system based on MIPI-CSI2

Since I have use MIPI-CSI2 acquire images and got image signals from it. Such as video_tdata,video_tlast, video_tuser and video_tvalid. But I dont know how to use other IP cores to realize HDMI display. I wonder if I use VTC(video timing controller) and axi4-stream to video out, can I realize the video output? Should I configure it by PS core?

Tags (2)
MIPICSI2.PNG
0 Kudos
Reply
4 Replies
Moderator
Moderator
249 Views
Registered: ‎11-09-2015

Hi @gaoce123008 

You might be clearer on your requirements. It will depends a lot on the board you are using. I mentioned the different HDMI interface you could do in the following topic:

https://forums.xilinx.com/t5/Video-and-Audio/Verilog-program-algorithm-for-HDMI-interfacing/m-p/1125954/highlight/true#M33143

if you are using a HDMI connector there are multiple different options depending on the board you have.

If the board has a ADV7511, this is taking care of the HDMI layer. This is what I shown running on the ZC702 board:

Video Series 19: Using the On-Board HDMI on ZC702 (Vivado design)

Video Series 20: Starting with SDK and configuring the ADV7511

Video Series 21: TPG Application on ZC702

If the board does not have an ADV7511, then you have again multiple options. On HDMI connectors if it is not connected to the devices gigabit tranceivers (GTs), then you can do DVI through HDMI or HDMI 1.4

For DVI, you can use the digilent IP. I showed an example running on the PYNQ-Z2 in the following article:

Video Series 23: Generate a video output on Pynq-Z2 HDMI out

If you want HDMI, I just noticed an article on Hackster.io talking about an open source HDMI (1.4) IP:

https://www.hackster.io/news/open-source-hdmi-for-fpga-f3e885b41aa5

Finally, I you need to support resolutions >1080p then you will have to use the GTs of the device and pay for a license for a HDMI IP as I am not aware of any free solution. Te Xilix solution is mentioned in PG235:

https://www.xilinx.com/support/documentation/ip_documentation/v_hdmi_tx_ss/v3_1/pg235-v-hdmi-tx-ss.pdf 

https://www.hackster.io/news/open-source-hdmi-for-fpga-f3e885b41aa5

It is also good to note that there are example designs using the MIPI CSI-2 RX with an HDMI output:

-> If you are working on baremetal and Zynq Ultrascale+ device, you can refer to the MIPI CSI-2 RX example design mentioned in PG232 chapter 5.

-> If you are using linux and Zynq Ultrascale+, you can refer to the ZCU102 TRD or ZCU106 VCU TRD


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Visitor
Visitor
196 Views
Registered: ‎02-27-2020

Thank you, now I have used a VTC and a video_out core to debug video signals.  I can get HSYNC, VSYNC, and video_out signals from VTC, but I cant get these signals from Viedo_out core.

Tags (1)
0 Kudos
Reply
Moderator
Moderator
135 Views
Registered: ‎11-09-2015

HI @gaoce123008 

I have explained how to debug the AXI4-Stream to Video out in this article:
Video Beginner Series 8: Debugging the AXI4-Stream to Video Out IP

It might be that the MIPI CSI2 RX is not producing any data. Check the tvalid signal from the IP as per following article

Video Series 35 – Oh no! My video design does not work! What should I do?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
Xilinx Employee
Xilinx Employee
125 Views
Registered: ‎03-30-2016

Hello @gaoce123008 

If you are suspecting that is not working as expected. Please share :
   1. Register dump
   2. XCI file of MIPI CSI-2 RX Subsystem

We can find out if MIPI CSI-2 RX is working as expected or not.

Regards
Leo

0 Kudos
Reply