07-12-2020 07:55 PM - edited 07-12-2020 08:27 PM
Since I have use MIPI-CSI2 acquire images and got image signals from it. Such as video_tdata,video_tlast, video_tuser and video_tvalid. But I dont know how to use other IP cores to realize HDMI display. I wonder if I use VTC(video timing controller) and axi4-stream to video out, can I realize the video output? Should I configure it by PS core?
07-13-2020 01:14 AM
You might be clearer on your requirements. It will depends a lot on the board you are using. I mentioned the different HDMI interface you could do in the following topic:
if you are using a HDMI connector there are multiple different options depending on the board you have.
If the board has a ADV7511, this is taking care of the HDMI layer. This is what I shown running on the ZC702 board:
If the board does not have an ADV7511, then you have again multiple options. On HDMI connectors if it is not connected to the devices gigabit tranceivers (GTs), then you can do DVI through HDMI or HDMI 1.4
For DVI, you can use the digilent IP. I showed an example running on the PYNQ-Z2 in the following article:
If you want HDMI, I just noticed an article on Hackster.io talking about an open source HDMI (1.4) IP:
Finally, I you need to support resolutions >1080p then you will have to use the GTs of the device and pay for a license for a HDMI IP as I am not aware of any free solution. Te Xilix solution is mentioned in PG235:
It is also good to note that there are example designs using the MIPI CSI-2 RX with an HDMI output:
-> If you are working on baremetal and Zynq Ultrascale+ device, you can refer to the MIPI CSI-2 RX example design mentioned in PG232 chapter 5.
07-17-2020 06:16 AM
Thank you, now I have used a VTC and a video_out core to debug video signals. I can get HSYNC, VSYNC, and video_out signals from VTC, but I cant get these signals from Viedo_out core.
07-27-2020 02:12 AM
I have explained how to debug the AXI4-Stream to Video out in this article:
Video Beginner Series 8: Debugging the AXI4-Stream to Video Out IP
It might be that the MIPI CSI2 RX is not producing any data. Check the tvalid signal from the IP as per following article
07-27-2020 03:13 AM
If you are suspecting that is not working as expected. Please share :
1. Register dump
2. XCI file of MIPI CSI-2 RX Subsystem
We can find out if MIPI CSI-2 RX is working as expected or not.