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1,507 Views
Registered: ‎12-25-2018

Is FMC HPC1 connector of ZCU102 1.1 supports second LI-IMX274MIPI board?

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Hi,

I have implemented MIPI CSI2 camera interface on ZCU102 board using FMC HPC0 slot. (LI-IMX274MIPI camera module) It is working.

I would like to implement second MIPI CSI2 interface on FMC HPC1 slot. I find that the HDMI TX differential clock is on bank 65 using LVDS IOSTANDARD.

Bank 65 is the the bank that will receives MIPI interface from FMC HPC1 slot if LI-IMX274 card is connected. But the IOSTANDARD for bank 65 will be MIPI D-PHY DCI which is 1.2V.

Is it possible to use second LI-IMX274 card on FMC HPC1 slot? Seems like IOSTANDARDS conflict.

Please see the constraints below.

-----------------------------HDMI Tx clock----------------------------------------------------------------------------

set_property IOSTANDARD LVDS [get_ports HDMI_TX_CLK_P_OUT]
set_property PACKAGE_PIN AF6 [get_ports HDMI_TX_CLK_P_OUT]

------------------------------HDMI Tx clock----------------------------------------------------------------------------

------------------------------FMC HPC1 slot----------------------------------------------------------------------------

set_property PULLUP true [get_ports IIC_sensor1_scl_io]
set_property PULLUP true [get_ports IIC_sensor1_sda_io]
set_property PACKAGE_PIN T12 [get_ports IIC_sensor1_scl_io]
set_property PACKAGE_PIN R12 [get_ports IIC_sensor1_sda_io]
set_property IOSTANDARD HSUL_12_DCI [get_ports IIC_sensor1_scl_io]
set_property IOSTANDARD HSUL_12_DCI [get_ports IIC_sensor1_sda_io]

# GPIO Configuration
set_property PACKAGE_PIN AG11 [get_ports {GPIO_sensor1_tri_o[0]}]
set_property PACKAGE_PIN U10 [get_ports {GPIO_sensor1_tri_o[1]}]
set_property PACKAGE_PIN AG9 [get_ports {GPIO_sensor1_tri_o[2]}]

set_property IOSTANDARD LVCMOS12 [get_ports {GPIO_sensor1_tri_o[*]}]

------------------------------FMC HPC1 slot----------------------------------------------------------------------------

 

Regards

aye@leica 

 

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1,259 Views
Registered: ‎12-25-2018

Hi Leo,

Thanks for your reply. 

Its working now for second MIPI camera board on FMC HPC1 slot.

Ok will change iostandard for hdmi tx clk p/n to diff_sstl12.

 

 

Regards

Aye@leica

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3 Replies
1,399 Views
Registered: ‎12-25-2018

Hi guys,

Any one got experience using FMC HPC1 slot for ZCU102 using LI-IMX274MIPI card?

What should be the right constraints for HDMI TMDS clock? Can I change the HDMI TX clock constraints from

-----------------------------HDMI Tx clock----------------------------------------------------------------------------

set_property IOSTANDARD LVDS [get_ports HDMI_TX_CLK_P_OUT]
set_property PACKAGE_PIN AF6 [get_ports HDMI_TX_CLK_P_OUT]

------------------------------HDMI Tx clock----------------------------------------------------------------------------

to

------------------------------------------------------------------------------------------------------------------------------

set_property PACKAGE_PIN AF6 [get_ports HDMI_TX_CLK_P_OUT]
set_property PACKAGE_PIN AG6 [get_ports HDMI_TX_CLK_N_OUT]
set_property IOSTANDARD MIPI_DPHY_DCI [get_ports HDMI_TX_CLK_P_OUT]
set_property IOSTANDARD MIPI_DPHY_DCI [get_ports HDMI_TX_CLK_N_OUT]

 

Any help is appreciated.

Regards

aye@leica 

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karnanl
Xilinx Employee
Xilinx Employee
1,288 Views
Registered: ‎03-30-2016

Hello Aye yan-eng.ang@leica-microsystems.com

> Regarding pin assignment

Just checked ZCU102 schematic and MIPI CSI-2 RX Example design, for pin-assignment from Image sensor.
Yes, I believe it is possible.
-- Note : I did not verify it on HW.

> Is it possible to use second LI-IMX274 card on FMC HPC1 slot? Seems like IOSTANDARDS conflict.

Hmm, If you want to use MIPI I/F. VADJ_FMC need to be set as 1.2V.
Please note that assigning LVDS I/O on bank with VCCO=1.2V is not a good practice.

For now, current setting will work since Vivado do not know whether you supply VCCO of bank 65 as 1.8V or 1.2V.
HDMI_TX_CLK_P/N pin will still output clock signals, but I am not sure if the output swing level is correct.

>I would like to implement second MIPI CSI2 interface on FMC HPC1 slot.

But, if you're planning to add MIPI I/O on bank65 you will defenitely need to change the IO standard of HDMI_TX_CLK_P_OUT.
Or else Vivado implementation will fail.
Using MIPI_DPHY_DCI standard for other than MIPI is not recommended, perhaps DIFF_SSTL12 is a better choice.

 

Good luck and Hope this helps.

Thanks & regards
Leo


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1,260 Views
Registered: ‎12-25-2018

Hi Leo,

Thanks for your reply. 

Its working now for second MIPI camera board on FMC HPC1 slot.

Ok will change iostandard for hdmi tx clk p/n to diff_sstl12.

 

 

Regards

Aye@leica

View solution in original post