11-09-2020 01:41 PM
Is it possible to use custom video source IP core in combination with the Frame Buffer Write IP core? This topic has already been discussed here. I guess is not or trivial, but I wonder if it is even possible to write a Linux driver for this combination that will generate a media device?
11-10-2020 02:47 AM
Hello johannes.eklange@trakkasystems.com
thanks for explaining the pipeline. TPG IP linux driver is great example for passthrough application. I don't think it can flush the data but it should not be a big deal to have such feature and is totally possible. Xilinx does not have such solution right now.
with regards
Kunal
11-09-2020 11:36 PM
Hello johannes.eklange@trakkasystems.com
Yes, it is possible to write V4l2 driver and there is no such limitation.
what is going to be your exact video pipeline?
regards
Kunal
11-10-2020 12:13 AM
Pipeline:
SDI_RX -> CSC -> SCALER -> MIXER -> BROADCASTER -> CSC -> SDI_TX
|
-> FRAME_BUFFER_WRITE
We have managed to control the top video pipeline without gstreamer by writing to registry via AXI ports. An idea is to add an IP core between the broadcaster and FRAME_BUFFER_WRITE that can act as a passthrough or flush of the video stream. I understand that one can use the TPG driver as inspiration for writing a Linux driver. To me that task feels overwhelming, but I just need to know if it's possible for an expert. Perhaps there is some simpler solution that I have overlooked?
11-10-2020 02:47 AM
Hello johannes.eklange@trakkasystems.com
thanks for explaining the pipeline. TPG IP linux driver is great example for passthrough application. I don't think it can flush the data but it should not be a big deal to have such feature and is totally possible. Xilinx does not have such solution right now.
with regards
Kunal
11-10-2020 03:02 AM
Thanks!