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jagadeesh10
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Registered: ‎07-26-2017

MIPI CSI-2 Rx Example - HDMI Output

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Implemented MIPI CSI-2 Rx Subsystem Application Example for Zynq® UltraScale+™ ZCU102 Rev 1.0 board. After program FPGA and executing the application, I'm seeing Error programming free mode SI5324.
i'm not seeing any Video output.

Thanks
Jagadeesh

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florentw
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Registered: ‎11-09-2015

Hi @jagadeesh10,

 

If everything is clear for you on this subject, please kindly mark a reply as solution to close the topic. Else please reply to the topic

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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florentw
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Registered: ‎11-09-2015

Hi @jagadeesh10,

 

Which version of vivado are you using?

 

It seems to be the same issue as mentioned here (even if not same example design):

https://forums.xilinx.com/t5/Video/ZCU102-HDMI-example-design-error/td-p/834841/page/2

 

Could you check your SDK settings?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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florentw
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Registered: ‎11-09-2015

Hi @jagadeesh10,

 

If everything is clear for you on this subject, please kindly mark a reply as solution to close the topic. Else please reply to the topic

 

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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