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guyeli31
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Registered: ‎05-16-2018

MIPI CSI-2 Rx on Vivado 2018.1

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I was trying to run the reference design for MIPI CSI-2 Rx on Vivado 2018.1. After picking MIPI CSI-2 Rx Subsystem in the IP Catalog and choosing open example design I got these synth 2 errors:

 

1. [synth 8-439] module 'design_1_v_gamma_lut_0_0_v__gamma_lut' not found

2. [synth 8-439] module 'design_1_v_demosaic_0_0_v_demosaic' not found

 

What did I do wrong? Is there any other way to run the reference design on Vivado 2018.1?

 

Thanks

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florentw
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Registered: ‎11-09-2015

Hi @guyeli31,

 

2 possible root causes:

  • You are on windows and the path you are using is too long. Please try to use a really short path (use the root of your directory)
  • The gamma LUT should not require a license but we have an issue in 2018.1 where is is linked to the TPG (see AR#71086).  You might want to make sure you have the TPG license (can be generated for free).

 

You can investigate more by looking into the vivado_hls.log file generated in the output for the IP synthesis (in ip_name_synth_1 folder)

 

Hope that helps,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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florentw
Moderator
Moderator
1,573 Views
Registered: ‎11-09-2015

Hi @guyeli31,

 

2 possible root causes:

  • You are on windows and the path you are using is too long. Please try to use a really short path (use the root of your directory)
  • The gamma LUT should not require a license but we have an issue in 2018.1 where is is linked to the TPG (see AR#71086).  You might want to make sure you have the TPG license (can be generated for free).

 

You can investigate more by looking into the vivado_hls.log file generated in the output for the IP synthesis (in ip_name_synth_1 folder)

 

Hope that helps,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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florentw
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1,295 Views
Registered: ‎11-09-2015

Hi @guyeli31,

 

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" buton below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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