cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
yuko.2828
Adventurer
Adventurer
340 Views
Registered: ‎12-27-2018
Hi Xilinx
I think MIPI CSI2 RX does not support data scrambling.
What is future plan to support this ?
 
Best regards
Tags (2)
0 Kudos
1 Solution

Accepted Solutions
karnanl
Xilinx Employee
Xilinx Employee
286 Views
Registered: ‎03-30-2016

Hello @yuko.2828 

This is a new feature introduced in MIPI CSI-2 ver2.0 spec !
Your understanding is correct that (at current Vivado 2019.2 version) Xilinx MIPI CSI-2 TX/RX does not support data scrambling feature.
MIPI_NO_SCRAMBLING.png

We do understand that data-scrambling can mitigate the effects of EMI and RF self-interference.
by spreading transmission energy over wider frequency range, so noise sensitive system may have some benefit from it.

But, please understand that this is an optional feature , as stated in the spec.
We do not have any milestone to implement this feature yet.

Regards
Leo


------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------

View solution in original post

1 Reply
karnanl
Xilinx Employee
Xilinx Employee
287 Views
Registered: ‎03-30-2016

Hello @yuko.2828 

This is a new feature introduced in MIPI CSI-2 ver2.0 spec !
Your understanding is correct that (at current Vivado 2019.2 version) Xilinx MIPI CSI-2 TX/RX does not support data scrambling feature.
MIPI_NO_SCRAMBLING.png

We do understand that data-scrambling can mitigate the effects of EMI and RF self-interference.
by spreading transmission energy over wider frequency range, so noise sensitive system may have some benefit from it.

But, please understand that this is an optional feature , as stated in the spec.
We do not have any milestone to implement this feature yet.

Regards
Leo


------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------

View solution in original post