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sarslan
Visitor
Visitor
185 Views
Registered: ‎10-31-2019

MIPI Transmitter IP - Resulting fps is half of the expected.

Hello,

I am trying to get video data from FPGA via MIPI interface. Jetson TX2 is on the receiver side.

I am able to get video and stream it from Jetson TX2 but, the resulting frame rate is half of the expected frame rate.

I tried many things in TX2 side and now I'm stuck. 

Do you have any suggestion about this issue ? Is there anything that I can change on MIPI Transmitter IP side ?

Lastly, I asked same question in nvidia forum, and here is the link : https://forums.developer.nvidia.com/t/resulting-fps-is-half-of-expected-fps/166386. I can't get result from this question.

So,

If you have any suggestion, please let me know.

Thanks.

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karnanl
Xilinx Employee
Xilinx Employee
143 Views
Registered: ‎03-30-2016

Hello @sarslan 

1. Are you using MIPI CSI-2 TX subsystem or MIPI D-PHY TX ?
    Could you please share the IP configuration (XCI file) ?

2. Could you please share MIPI TX side register dump ?

3. What kind of Data Type you want to send ? What is the Line length ?
    Did you set s_axis_tuser[63:48] and [6:1] bits correctly ?
    Data_Type_and_WC.png

Thanks & regards
Leo

 


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