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sajjad_ahmed
Visitor
Visitor
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Registered: ‎06-18-2019

MPSoC ZCU102 ViewSonic LCD on Display Port interface

ViewSonic TD2230 display is unable to show output with ZCU102 over DP interface. When connected a message "out of range" shows on the display. Specs are:

MPSoC ZCU102 revision: 1.1

Driver: Linux DRM

SDK: 2018.3 Peta Linux

There are a couple of other displays that works fine with ZCU102 but I want to know is there anything we can do to make ZCU102 work with above mentioned ViewSonic display. I know this is not a supported display as per this article,  https://www.xilinx.com/support/answers/68671.html

Using SDK 2018.3 UltraZed-EG works with ViewSonic display, I would like to know what's different for ZCU102

Attached is the DRM debug logs

13 Replies
watari
Professor
Professor
1,300 Views
Registered: ‎06-16-2013

Hi @sajjad_ahmed 

 

According the following line of your attached file, the route cause is "Can't generate the following clock frequency" (148.5[MHz]).

 

-----

[ 8.282613] [drm:drm_mode_debug_printmodeline] Modeline 41:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[ 8.282618] [drm:drm_mode_prune_invalid] Not using 1920x1080 mode: CLOCK_HIGH

-----

 

It means that your design has something wrong.

So, would you make sure clock tree or clock frequency setting on PLL ?

 

Best regards,

sajjad_ahmed
Visitor
Visitor
1,277 Views
Registered: ‎06-18-2019

Hi @watari 

Design file "Xilinx-zcu102-2018.3.hdf " that I'm using is the one provided with zcu102 BSP, assuming that it should configure the DP related PLL clocks, as most of the displays, I tried works great. 

 

Best regards

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florentw
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Registered: ‎11-09-2015

Hi @sajjad_ahmed 

This is weird that it fails on ZCU102 and not on Ultrazed. My guess is that the link cannot be trained with enough lanes or rate thus no resolution supported by the monitor can be transmitted.

Can you just tried with the pre-built images from the BSP? Also can you try with a different cable?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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sajjad_ahmed
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Registered: ‎06-18-2019

@florentw  I tried pre-built images (provided with BSP) with no success. Changing cable may not help as I used the same one with other working displays, "link trained" is something relevant, as if initially I connect the board to a Good LCD and then connect the cable to ViewSonic it shows output but NOT if we "trained" it initially with ViewSonic LCD.

So it's definitely related to negotiation between the DP controller and ViewSonic display,

also if it's only happening with ZCU102 then it could be a bit improperly configured DP controller by the provided hardware definition design file so the problem appears in this case.

 

BR

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florentw
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Registered: ‎11-09-2015


@sajjad_ahmed wrote:

@florentw  I tried pre-built images (provided with BSP) with no success. Changing cable may not help as I used the same one with other working displays, "link trained" is something relevant, as if initially I connect the board to a Good LCD and then connect the cable to ViewSonic it shows output but NOT if we "trained" it initially with ViewSonic LCD.

So it's definitely related to negotiation between the DP controller and ViewSonic display,

also if it's only happening with ZCU102 then it could be a bit improperly configured DP controller by the provided hardware definition design file so the problem appears in this case.

[Florent] - I do not agree with this. It could also be that on ZCU102, you will be more sensible to noise on the GT lanes (which can be expected as the connector is further from the device).

This is also why trying another cable might help. The more signal quality you have, the more chance you will have to train properly

BR


 


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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watari
Professor
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Registered: ‎06-16-2013

Hi @sajjad_ahmed 

 

Can you compare log files of drm between ZCU102 and UltraZED-EG ?

If yes, would you share them ?

 

Best regards,

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florentw
Moderator
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Registered: ‎11-09-2015

Hi @sajjad_ahmed 

Do you have any update on this? Is everything clear for you?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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sajjad_ahmed
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Registered: ‎06-18-2019

@florentw I tried different cables / ZCU102 boards with no success for ViewSonic panel. Also observed that with a low-quality DP cable ZCU102 couldn't even show output on DELL panel which previously it showed, seems like ZCU102 have a shaky DP interface. 

Sorry for the late replay I got occupied by another task.

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florentw
Moderator
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Registered: ‎11-09-2015

Hi @sajjad_ahmed 

Once again, the distance between the connector and the device is much shorter on the UltraZed board so you will probably get better results with it.

However, the ZCU102 is working with most displays if using a DP1.2 compliant cable.

This cannot be guranated with a non-compliant cable even with other source (i.e. non Xilinx)


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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BigAl
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Registered: ‎03-24-2020

I had a similar issue with the zcu106 until I switch from a passive DisplayPort->DVI to and "active" cable.  The one I used was a "StarTech.com 6 ft DisplayPort to DVI Active Adapter Converter Cable"

A link to it on Amazon is here.

 

watari
Professor
Professor
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Registered: ‎06-16-2013

Hi @BigAl 

 

Would you post new thread and describe details, if you want to support your issue from forum ?

 

Best regards,

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joe306
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Registered: ‎12-07-2018

Did you get your project working? Very interesting.
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BigAl
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Registered: ‎03-24-2020

OK.  I've posted a longer explanation in this post.