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larryhld
Contributor
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Registered: ‎07-10-2019

Modify DisplayPort 1.4 RX zcu102 example design for zcu111

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Hi,

I've generated the DisplayPort 1.4 RX zcu102 example design based on the instructions in PG300. Seems like it would be possible to modify the example design to work on the zcu111 given that it has an FMC connector and uses the Znyq UltraSCALE PS. Would this simply be a matter of changing the pin out for the project or is there more to it than that? Also what is the most efficient method to change the pin out and device assignments, can I import the assignments somehow?

I plan to purchase a zcu102 specifically for this project but have a zcu111 for an RF project and am hoping to get a jump start on this effort.

Best Regards,

larryhld

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florentw
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Registered: ‎11-09-2015

HI @larryhld 

The first thing you will have to check is if the mapping of the FMC card and the one of the FMC connector are compatible.

Basically you need to check the following:

  1. Can you connect the 4 GT channels (i.e. 16 differential pins for RX and TX)
  2. can you connect the AUX lanes (in and out)
  3. Can you connect the HPD pins (in and out)
  4. Can you connect the clock pin

(BTW I haven't check so I cannot say if this is possible)

If this is matching, then you can port the ZCU102 to ZCU111 with the following way:

  1. Generate the design for the ZCU102
  2. Change the board target to ZCU111
  3. Edit the constraint file (xdc) to change the pin mapping to match the ZCU111 board

Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

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florentw
Moderator
Moderator
539 Views
Registered: ‎11-09-2015

HI @larryhld 

The first thing you will have to check is if the mapping of the FMC card and the one of the FMC connector are compatible.

Basically you need to check the following:

  1. Can you connect the 4 GT channels (i.e. 16 differential pins for RX and TX)
  2. can you connect the AUX lanes (in and out)
  3. Can you connect the HPD pins (in and out)
  4. Can you connect the clock pin

(BTW I haven't check so I cannot say if this is possible)

If this is matching, then you can port the ZCU102 to ZCU111 with the following way:

  1. Generate the design for the ZCU102
  2. Change the board target to ZCU111
  3. Edit the constraint file (xdc) to change the pin mapping to match the ZCU111 board

Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

larryhld
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Contributor
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Registered: ‎07-10-2019

Hi @florentw,

Thanks for this information, very helpful!

larryhld

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larryhld
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Registered: ‎07-10-2019

Hi @florentw 

Since I posted this I've purchased a couple of zcu102 boards and have the example design described in chapter 5 of PG233 working using Vivado 2020.1. We are working on modifying the design to write the AXI4 stream data out of the DisplayPort IP to the PS DDR. 

Since the example in PG233 is bare metal we can't think of a way to get the data from the PS DDR to a host PC, if we could build the example as a Linux application we'd have several options. I've noticed that you've commented on some other post about the status of the Linux device drivers for the DisplayPort IP and was hoping you could provide me with some information on what the design flow would be to use them. 

I was pointed to the repo that I believe contains the device drivers here: https://github.com/Xilinx/dp-modules

I also see that there is an option under petalinux-config -c kernel >Device Drivers>Graphics Support>ZynqMP DP subsystem driver that I'm not sure is related. 

Do you have any information/examples on how to setup the device drivers and use them in an example application with Linux.

Since I originally posted this reply I got some good information in this post Solved: Re: DisplayPort 1.4 RX example with Linux - Community Forums (xilinx.com) I started earlier. 

Seems like I read that there were plans to incorporate this into Petalinux in 2020.2, is that correct?

Thanks,

larryhld

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