I am new to the Xilinx SystemGenerator and AccelDSP environments and even FPGA.
We are trying to implement a communication system on Vertex-II FPGA. We have developed the Physical (PHY) layer of the system in MATLAB (.m files). Now want to implement the physical layer on FPGA fabric.
Our plan is to develop MATLAB physical layer model as an OPB compliant peripheral to the FPGA's Power-PC. For this goal, we are planning to modularize the PHY layer (.m) files to independent function calls and convert them to SystemGenerator blocks using AccelDSP tool. Once the SystemGenerator modules corresponding to all MATLAB functions are ready, we will integrate them in SystemGenerator to build the complete PHY. Then form SystemGenerator's block based model, we will attach it to to OPB bus in the similar manner as discussed in xapp264.
Can anyone provide suggestions on the above process - for example is it correct and optimum way, or we are missing some vital element etc. As we are new to this environment, any suggestions on how to quick start will be of great use to us.
Thanks for your comments. We have started learning AccelDSP tool. It seems that most of the process are automated - for example fixed point to floating point conversion, verification, sysgen block generation etc. Could you please elaborate on where we can face problems most likely? Then we will plan our time accordingly.