01-07-2021 08:03 AM
I am working on a design where I have to encode 2k@60 video data received from an SDI RX port using VCU. I am using VDMA for transferring SDI RX data to PSDDR. To synchronize writing and reading I am using a custom RTL to create an Interrupt that gets triggered when the VDMA S2MM Frame pointer value changes. Once the Interrupt is triggered the PS will reset the interrupt through an AXI Lite interface and it will start reading the frame from PS DDR.
The VDMA S2MM Frame pointer after gray to binary conversion is stored in a register. PS reads this register to identify s2mm frame pointer location.
While testing and watching output video frame by frame it seems the write and read goes out of synchronization after 30-40 seconds. But after 10-20 sec synchronization returns. Then it remains synchronized for another 30-40 seconds, which is again followed by synchronization error.
I believe this could be because of interrupt. I used a simple custom RTL for generating the interrupt I have attached the RTL used. The clk frequency is 100MHz.
. . . always @ (posedge clk) begin s2mm_frm_in_d1<=s2mm_frm_ptr_in; s2mm_frm_in_d2<=s2mm_frm_in_d1; end always @ (posedge clk) begin if(!rst_n) begin usr_irq_out<=0 ; end else begin if ((s2mm_frm_in_d1!=s2mm_frm_in_d2) && irq_en) begin usr_irq_out <= 1; end else if (isr_done || !irq_en) begin usr_irq_out <= 0; end else begin usr_irq_out <= usr_irq_out; end end end . . .
Is my RTL correct for generating an interrupt? Or Should I create the interrupt at the PS core clock frequency?
01-11-2021 09:38 AM
Have you already looked at our VCU TRD designs for reference?
we have never used VDMA IP for VCU applications and don't recommend them to use as well. We always recommend to use framebuffer read/write pair for capture and display path.
01-13-2021 02:37 AM
Thanks for the reply.
Is there any particular reason for using Frame buffer Write IP rather than VDMA?
We got the above observation when we used the main profile of VCU for encoding. One more interesting observation we had is when we used the base profile for encoding, the encoded video didn't seem to have any issues at least for 8 mins.
01-24-2021 08:10 PM
VDMA IP doesn't provide support for semi planar video formats which is must for Xilinx VCU core.
Following answer record summarizes everything that you should know about both the DMA IPs and there usage.