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jjf
Visitor
Visitor
269 Views
Registered: ‎01-20-2021

Reading and writing to DRAM with Zynq-7000 VIP

I am using the vip, I write to DRAM with

tb.zynq_sys.base_zynq_i.processing_system7_0.inst.write_data(32'h10000300, 32'hABCDEF01, 128);
tb.zynq_sys.base_zynq_i.processing_system7_0.inst.read_data(32'h40000000,128,read_data,resp);

I am running the vdma, and I see it wants data at h10000300,  but I get unknowns.  What and I doing wrong

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4 Replies
jjf
Visitor
Visitor
259 Views
Registered: ‎01-20-2021

 sorry, I am using the write_mem and read mem commands.

So, the tb code is:

tb.zynq_sys.base_zynq_i.processing_system7_0.inst.write_mem(32'hABCDEF01,, 32'h10000300, 128 );
tb.zynq_sys.base_zynq_i.processing_system7_0.inst.read_mem(32'h10000300, 128, resp);

I am trying to back door writing to DRAM.  Does DRAM need to me there in the simulation model?

 

 

 

 

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jjf
Visitor
Visitor
250 Views
Registered: ‎01-20-2021

To continue.  The S_AXI_HP0_RDATA is undefined.  I also tried with preloading the DDR (pre_load_mem)

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watari
Teacher
Teacher
223 Views
Registered: ‎06-16-2013

Hi @jjf 

 

Would you share your bd as pdf or picture ?

 

Best regards,

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jjf
Visitor
Visitor
143 Views
Registered: ‎01-20-2021

I solved this with pre_mem_load

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