07-24-2019 07:34 PM - edited 07-24-2019 07:47 PM
Hi
I'm having few queries regarding MIPI interface with FPGA.
1) In SP701 evaluation board, CSI and DSI interface is connected to two different banks. CSI being connected to 2.5V bank using a resistor network and DSI is connected to 1.8V bank. But in xapp894 it is given as below for CSI.
Here how HSUL_12_S_HR is compatible with 2.5V bank , please clarify.
2) If i'm implementing below circuitry for DSI (in Artix 7), can i connect MC2002 IOs to 1.8V bank ?
3) If i'm implementing below circuitry for CSI (in Artix 7), can i connect MC2001 IOs to 1.8V bank ? Is 2.5V bank voltage mandatory for CSI interface ?
Please reply.
07-26-2019 12:25 AM
Hello @bivin
>3) Please confirm with Meticom ICs (MC20901,MC20902) i have to use always 2.5V banks in Artix 7 .
You can go to Meticom URL and download their datasheet. You need to use 2.5V. (Requirement from Meticom)
http://www.meticom.com/resources/Datasheets/MC20002-V1_08.pdf
http://www.meticom.com/resources/Datasheets/MC20001-V1_09.pdf
>2) Is there any validation tool/checklist for the same ?
You can use Vivado to check whether your pin assignment is correct or not.
Please create a test design, plan your pin-assignment, and implement your test design.
Vivado will check whether your pin-assignment is good to go.
>1) Is there any specific IO to which i need to connect HS_P/N as well as LP_P/N ?
Could you please check PG202 Appendix C and UG471.
Thanks & regards
Leo
07-25-2019 07:12 PM
Hello @bivin
2) If i'm implementing below circuitry for DSI (in Artix 7), can i connect MC2002 IOs to 1.8V bank ?
No.
3) If i'm implementing below circuitry for CSI (in Artix 7), can i connect MC2001 IOs to 1.8V bank ? Is 2.5V bank voltage mandatory for CSI interface ?
No, it is not a mandatory but I believe MC2001/MC2002 only support 2.5V.
-- The requirement/limitation is on Meticom devices.
1) In SP701 evaluation board, CSI and DSI interface is connected to two different banks.
CSI being connected to 2.5V bank using a resistor network and DSI is connected to 1.8V bank. But in xapp894 it is given as below for CSI.
It should be possible I think. (See table below). Could you please check UG471 ?
Thanks & regards
Leo
07-25-2019 07:39 PM
Hi @karnanl
Thanks for the reply. I'm having few queries.
1) Is there any specific IO to which i need to connect HS_P/N as well as LP_P/N ?
2) Is there any validation tool/checklist for the same ?
3) Please confirm with Meticom ICs (MC20901,MC20902) i have to use always 2.5V banks in Artix 7 .
07-26-2019 12:25 AM
Hello @bivin
>3) Please confirm with Meticom ICs (MC20901,MC20902) i have to use always 2.5V banks in Artix 7 .
You can go to Meticom URL and download their datasheet. You need to use 2.5V. (Requirement from Meticom)
http://www.meticom.com/resources/Datasheets/MC20002-V1_08.pdf
http://www.meticom.com/resources/Datasheets/MC20001-V1_09.pdf
>2) Is there any validation tool/checklist for the same ?
You can use Vivado to check whether your pin assignment is correct or not.
Please create a test design, plan your pin-assignment, and implement your test design.
Vivado will check whether your pin-assignment is good to go.
>1) Is there any specific IO to which i need to connect HS_P/N as well as LP_P/N ?
Could you please check PG202 Appendix C and UG471.
Thanks & regards
Leo