01-13-2021 11:28 AM
I am about to start running a board level LPDDR2 interface simulation on Mentor HyperLynx tool. We have created the IBIS model from the Xilinx FPGA development tool. I wonder if I need to make any changes to the IBIS mode to run a successful simulation? any other thing to watch out?
01-13-2021 01:17 PM
01-13-2021 01:34 PM
No problem yet as I have not started it yet. I just wanted to know if there are special instructions and setups to the IBIS model. if nothing I will run and post an update here or questions if I may have.
01-15-2021 12:37 AM
Had the IBIS model generated for XC7Z015 FPGA. but I get some error/warnings after I setup LPDDR2 parameters in DDRx Wizard of HyperLynx Simulator. I have attached the error log file for your reference. I would like to know how I can fix the issues that are listed in this error log. Specifically I want to fix errors that are shown in lines 5, 6, 91, 99, and 110, 113, and more that resemble the ones in lines 99 & 113.
First time creating IBIS in-house, so want to make sure all is good with IBIS model before I run the simulation.
01-16-2021 03:39 PM