04-10-2018 02:27 AM
Hi,
I am planning to use a LCD touch display with LVDS interface in my design.
How can I interface the frame reader output (Axi stream) to LVDS interface as required by my LCD display?
Is there any IP block to be used?
Regards,
Vinay Shenoy
04-17-2018 04:22 PM
I guess it seems that your question is how do I describe FPD link Tx with Xilinx IP.
If yes, would you refer the following URL ?
Best regards
04-12-2018 12:34 AM
Hi @vinay_shenoy,
To convert from AXI4S to native video you can use the AXI4S to video out IP. See PG044 for reference.
Hope that helps,
Regards,
04-16-2018 12:01 AM
Hi @vinay_shenoy,
Do you have evetyrhing you need on this? If this is the case, please kindly close the topic by marking a reply as accepted solution.
Regards,
04-17-2018 07:25 AM
04-17-2018 07:39 AM
Hi @vinay_shenoy,
LVDS is only an ouput standard. The termination is handled by the FPGA when you assign the correct one in your constraint file.
Regards,
04-17-2018 07:42 AM
Typically LVDS Video is "native" video format in terms of the signals (i.e. HSync, VSync, HBlank, VBlank, Active Video), but uses the LVDS IO Standard. To set the LVDS IO Standard you would use the Pin Planning tools to create constraints that set the correct IO Standard. It is best to read the data sheet for your LVDS LCD Display to confirm the specific requirements.
04-17-2018 04:22 PM
I guess it seems that your question is how do I describe FPD link Tx with Xilinx IP.
If yes, would you refer the following URL ?
Best regards
04-24-2018 12:39 AM
Hi @vinay_shenoy,
If everything is clear for you, please kindly close the topic by marking a reply as accepted solution.
Thanks and Regards,