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Observer
Observer
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Registered: ‎04-03-2019

VDMA IP Vivado 2018.3 s2mm_frame_ptr_out KC705

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I have a problem with VDMA 6.3 and KC705 evb.

I enable only write channel with 7 frame buffers, with genlock mode Master in the IP configuration GUI. I configured the VDMA with MicroBlaze in circular buffer Mode, enabled the s2mm interrupt but i see that frame numbers is greater than 7, and there is no circular buffer. The images below show the IP configuration GUI, and the ILA data. The same situation appears with the second VDMA enabled only read channel and configured in Slave mode, with mm2s_frame_ptr_out that is not circular and frame numbers is greater than 7.

 

What is the reason?

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vdma_0.jpg
vdma_1.jpg
vdma_2.jpg
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Moderator
Moderator
483 Views
Registered: ‎11-09-2015

Hi @partieri 

As per pg020 p43, the value outputted on mm2s_frame_ptr_out is encodded as gray code:

vdma.JPG

This is why you see number greater than 7 and not circular.

Check table c-1 in pg020.

What you se is correct:

9 (buffer 7) -> 1 (buffer 0) -> 3 (buffer 1) -> 2 (buffer 2) -> 6 (buffer 3) ...

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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Moderator
Moderator
484 Views
Registered: ‎11-09-2015

Hi @partieri 

As per pg020 p43, the value outputted on mm2s_frame_ptr_out is encodded as gray code:

vdma.JPG

This is why you see number greater than 7 and not circular.

Check table c-1 in pg020.

What you se is correct:

9 (buffer 7) -> 1 (buffer 0) -> 3 (buffer 1) -> 2 (buffer 2) -> 6 (buffer 3) ...

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

Moderator
Moderator
457 Views
Registered: ‎11-09-2015

HI @partieri 

Do you have any update on this? Is everything clear for you?

If your question is answered or your issue is solved, please kindly mark the response which helped as solution (click on "Accept as solution" button below the reply)

If this is not solved/answered, please reply in the topic giving more information on your current status.

Thanks and Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
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