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aamir_sheikh
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Registered: ‎11-02-2020

VDMA Simultaneous read and write

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Hi,

I am trying to store video data(800x600) streamed in through HDMI on PYNQ-Z1 board. And to verify, use the other HDMI out port to stream the stored data.

attached is the block design.it was made using vivado version 2017.1.

1. My question is would this design work, or would I need two separate VDMAs?.
2. Do I need VTC at the input side? 
3. Are there any connections missing?

Thanks!

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Nikhil_Thapa
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Registered: ‎05-28-2020

Hi @aamir_sheikh ,

Well, your VDMA code seems working. 

but I am getting random noise on my monitor whether or not my source is connected.

Looks like there are no incoming data from source. Therefore, VDMA is just reading garbage value from the DDR memory.

As I said before, there are no incoming data from your source. In your BD, there is no HDMI HPD port. This is very important that without HPD signal, the HDMI source will never transmit the data to destination. You can also check yourself. When you run the design in the board and then connect HDMI cable to your source device, like PC or laptop or any, here I am taking Laptop, for example, as soon as you connect the HDMI cable, Laptop screen must go black for a while. This means, Laptop has detected the HDMI HPD signal. So that, it now starts streaming. 

In your case, if you do not observe any of above, then your source is not transmitting the data to the board and then not getting output.

Therefore, you must add HDMI HPD port in your BD.

Let me know after you do this.

 

Regards,

nikhil@logictronix.com
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Nikhil_Thapa
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Registered: ‎05-28-2020

Hi @aamir_sheikh ,

I have checked the BD you attached. The BD looks good. But your information are not enough. Can you give little more information about your design and the actual problem you faced? However...

1. My question is would this design work, or would I need two separate VDMAs?.

Well, according to your design requirement, a single VDMA will work great.

2. Do I need VTC at the input side? 

If you are taking fixed input video resolution stream, then VTC will not be required so far.

3. Are there any connections missing?

Well, connections seem good. I cannot say anything until you clearly specify your actual problem. There are lot of things we have to consider. However, here are my some points;

You are using clocking wizard IP for output video pixel clock. What is your output video resolution and what clock frequency do you use in clocking wizard IP? This is very IMPORTANT that IP must generate the pixel clock corresponding to output video mode (video resolution). And one more suggestion, if your input and output video resolutions are same, then you can directly connect PixelClk (DVI-to-RGB IP) to vid_io_in_clk (Video In to AXI4-Stream IP), clk (VTC IP), vid_io_out_clk (AXI4-Stream to Video Out IP) and PixelClk (RGB-to_DVI IP).

Another most important thing is; you must check the configuration of VDMA to support input output video resolutions that you are trying to stream.

You can also use ILA. This is very useful to analysis the signal status and you will be able to find out the problem in your design. 

You can also check three status signals, i.e. Locked, UnderflowOverflow from AXI4-Stream to Video Out IP.

 

Regards,

nikhil@logictronix.com
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aamir_sheikh
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Registered: ‎11-02-2020

 thanks for replying.

there aren't problems "yet", I just thought that maybe I would need two VDMAs, and then subsequently how would the software for that look like.

resolution on both sides is fixed 800x600 at 60 Hz. Clocking wizard generates 40MHz.

do i need to use locked, underflow, and overflow signals to keep track of the memory?

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Nikhil_Thapa
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Registered: ‎05-28-2020

Hi @aamir_sheikh ,

do i need to use locked, underflow, and overflow signals to keep track of the memory?

Absolutely not. These signals are not for memory tracking. These signals give the status of output video streaming. 

image.png

Locked means your AXI4-Stream data and timing are synchronized to each other. So that, you will be able to get output from AXI4-Stream to Video Out IP.

Underflow signal flags that the FIFO has under-flowed. This should never occur in normal operation.

Overflow signal flags that the FIFO has over-flowed.

For more details, you can visit AXI4-Stream to Video Out IP Product Guide.

You can also check these signals status in your design by using ILA. By the way, are you getting output or not? These above mentioned signal will help you identify.

If you are getting Underflow high, then you can follow this;

Video Beginner Series 8: Debugging the AXI4-Stream... - Community Forums 

Besides this, I highly recommend you to check VDMA configuration and VTC timing generation parameters.

 

Regards,

nikhil@logictronix.com
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aamir_sheikh
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so I finally tried to implement some the SDK part. using the example that is given with the vivado installation at \SDK\2017.1\data\embeddedsw\XilinxProcessorIPLib\drivers\axivdma_v6_3\examples\vdma_api.c.

 

 

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xil_io.h"
#include "xaxivdma.h"
#include "xaxivdma_i.h"
#include "xparameters.h"


#ifdef XPAR_AXI_7SDDR_0_S_AXI_BASEADDR
#define MEMORY_BASE		XPAR_AXI_7SDDR_0_S_AXI_BASEADDR
#elif XPAR_MIG7SERIES_0_BASEADDR
#define MEMORY_BASE	XPAR_MIG7SERIES_0_BASEADDR
#elif XPAR_MIG_0_BASEADDR
#define MEMORY_BASE	XPAR_MIG_0_BASEADDR
#elif XPAR_PSU_DDR_0_S_AXI_BASEADDR
#define MEMORY_BASE	XPAR_PSU_DDR_0_S_AXI_BASEADDR
#elif XPAR_PS7_DDR_0_S_AXI_BASEADDR
#define MEMORY_BASE XPAR_PS7_DDR_0_S_AXI_BASEADDR
#else
#warning CHECK FOR THE VALID DDR ADDRESS IN XPARAMETERS.H, DEFAULT SET TO 0x01000000
#define MEMORY_BASE		0x01000000
#endif

/*** Global Variables ***/
unsigned int srcBuffer = (MEMORY_BASE  + 0x1000000);

int run_triple_frame_buffer(XAxiVdma* InstancePtr, int DeviceId, int hsize,
		int vsize, int buf_base_addr, int number_frame_count,
		int enable_frm_cnt_intr);

int Status;
XAxiVdma InstancePtr;

int main()
{
    init_platform();

	xil_printf("\n--- Entering main() --- \r\n");

	/* Calling the API to configure and start VDMA without frame counter interrupt */
		Status = run_triple_frame_buffer(&InstancePtr, 0, 800, 600,
							srcBuffer, 100, 0);
		if (Status != XST_SUCCESS) {
			xil_printf("Transfer of frames failed with error = %d\r\n",Status);
			return XST_FAILURE;
		} else {
			xil_printf("Transfer of frames started \r\n");
		}


    while(1);

    cleanup_platform();
    return 0;
}

 

 

 

and regardless of whether or not my source is connected I get random noise on the screen

the read and write addresses are the same.

 

 

--- Entering main() ---
Write Buffer 0 address: 0x1100000
Write Buffer 1 address: 0x125F900
Write Buffer 2 address: 0x13BF200
Read Buffer 0 address: 0x1100000
Read Buffer 1 address: 0x125F900
Read Buffer 2 address: 0x13BF200
Transfer of frames started

 

 

reading debug registers through XCST returns this. since i have no interupts enabled i think this is all 0s. and therefore no errors. 

xsdb% mrd 0x43000004
43000004: 00011000

xsct% mrd 0x43000034
43000034: 00010000

what could be the problem here?

20210201_140659.jpg
20210201_113834.jpg
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aamir_sheikh
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Registered: ‎11-02-2020

so I finally tried to implement the software using the api provided with vivado installation. \Xilinx\SDK\2017.1\data\embeddedsw\XilinxProcessorIPLib\drivers\axivdma_v6_3\examples\vdma_api.c

Source generates a stream of 800 by 600 stream 60hz. 

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xil_io.h"
#include "xaxivdma.h"
#include "xaxivdma_i.h"
#include "xparameters.h"


#ifdef XPAR_AXI_7SDDR_0_S_AXI_BASEADDR
#define MEMORY_BASE		XPAR_AXI_7SDDR_0_S_AXI_BASEADDR
#elif XPAR_MIG7SERIES_0_BASEADDR
#define MEMORY_BASE	XPAR_MIG7SERIES_0_BASEADDR
#elif XPAR_MIG_0_BASEADDR
#define MEMORY_BASE	XPAR_MIG_0_BASEADDR
#elif XPAR_PSU_DDR_0_S_AXI_BASEADDR
#define MEMORY_BASE	XPAR_PSU_DDR_0_S_AXI_BASEADDR
#elif XPAR_PS7_DDR_0_S_AXI_BASEADDR
#define MEMORY_BASE XPAR_PS7_DDR_0_S_AXI_BASEADDR
#else
#warning CHECK FOR THE VALID DDR ADDRESS IN XPARAMETERS.H, DEFAULT SET TO 0x01000000
#define MEMORY_BASE		0x01000000
#endif

/*** Global Variables ***/
unsigned int srcBuffer = (MEMORY_BASE  + 0x1000000);

int run_triple_frame_buffer(XAxiVdma* InstancePtr, int DeviceId, int hsize,
		int vsize, int buf_base_addr, int number_frame_count,
		int enable_frm_cnt_intr);

int Status;
XAxiVdma InstancePtr;

int main()
{
    init_platform();

	xil_printf("\n--- Entering main() --- \r\n");

	/* Calling the API to configure and start VDMA without frame counter interrupt */
		Status = run_triple_frame_buffer(&InstancePtr, 0, 800, 600,
							srcBuffer, 100, 0);
		if (Status != XST_SUCCESS) {
			xil_printf("Transfer of frames failed with error = %d\r\n",Status);
			return XST_FAILURE;
		} else {
			xil_printf("Transfer of frames started \r\n");
		}


    while(1);

    cleanup_platform();
    return 0;
}

but I am getting random noise on my monitor whether or not my source is connected.

20210201_113834.jpg20210201_140659.jpg

I printed out the source and destination addresses 

--- Entering main() ---
Write Buffer 0 address: 0x1100000
Write Buffer 1 address: 0x125F900
Write Buffer 2 address: 0x13BF200
Read Buffer 0 address: 0x1100000
Read Buffer 1 address: 0x125F900
Read Buffer 2 address: 0x13BF200
Transfer of frames started

both read and write addresses are the same. 

I printed out debug registers as suggested by @florentw in his video series 25.

xsdb% mrd 0x43000004
43000004: 00011000

xsct% mrd 0x43000034
43000034: 00010000

but for both cases the LSB is 0 so I think that means that there are no errors??

What could be wrong here?

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Nikhil_Thapa
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Registered: ‎05-28-2020

Hi @aamir_sheikh ,

Well, your VDMA code seems working. 

but I am getting random noise on my monitor whether or not my source is connected.

Looks like there are no incoming data from source. Therefore, VDMA is just reading garbage value from the DDR memory.

As I said before, there are no incoming data from your source. In your BD, there is no HDMI HPD port. This is very important that without HPD signal, the HDMI source will never transmit the data to destination. You can also check yourself. When you run the design in the board and then connect HDMI cable to your source device, like PC or laptop or any, here I am taking Laptop, for example, as soon as you connect the HDMI cable, Laptop screen must go black for a while. This means, Laptop has detected the HDMI HPD signal. So that, it now starts streaming. 

In your case, if you do not observe any of above, then your source is not transmitting the data to the board and then not getting output.

Therefore, you must add HDMI HPD port in your BD.

Let me know after you do this.

 

Regards,

nikhil@logictronix.com
:::::Do not forget to Accept as solution, give Kudo and Share a post that you think is helpful:::::

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aamir_sheikh
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587 Views
Registered: ‎11-02-2020

It works now. thank you so much. I have attached the Block diagram for anyone who stumbles upon this post in the future. Had to pull up the hdmi_hpd.

 

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Nikhil_Thapa
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Registered: ‎05-28-2020

Hi @aamir_sheikh ,

Glad to hear from you.

 

Had to pull up the hdmi_hpd.

Yes, exactly. You always have to do this.

 

You can share and close the thread by accepting the solution.

 

Regards,

nikhil@logictronix.com
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