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Explorer
Explorer
1,182 Views
Registered: ‎06-13-2012

VDMA error on write/read

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Hi all,

 

I'm working on a system that use the VDMA IP to change the frame rate between input and output.

The input comes from HDMI Xilinx IP 1920x1080p
I noticed that I've problems with the first line, reading the register 0x34 I see that EOLEarlyErr is set and enabling 0xF0 register 8 pixel are missing.

So after many ILA setup I found that the write or read miss exactly 8 pixel (I'm working with a bus of 4 pixel/clock).
In the screenshot below the Write operation:
Write Operation

 

TUSER goes High and start the new frame, after the 8 pixel value 1d801d801d801d80 (two clock TVALID = 1) I write again 8 pixel (bus value 1e801e801e801e80) twice

The read section:

ReadScreen.png

The read the pixel with value 1e801e801e801e80 are missing... the 8 pixel that generates the EOLEarlyErr.
I can't understand the problem as the axi-stream signals are ok, what can I check to solve or track down the problem?

The VDMA setup is: burst size of 8, bus width of 64bit, line buffer 4096

On the write channel: s2mm tuser, Dynamic Master
On the read channel: None, Dynamic Slave

 

Regards

 

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Explorer
Explorer
1,136 Views
Registered: ‎06-13-2012

Hi,

 

solved, the issue was started by enable TREADY parameter set to AUTO, the AUTO set it to NO.

After setting it to manual and to "Yes" everything seem to work now

 

Thank you

 

Regards

View solution in original post

1 Reply
Explorer
Explorer
1,137 Views
Registered: ‎06-13-2012

Hi,

 

solved, the issue was started by enable TREADY parameter set to AUTO, the AUTO set it to NO.

After setting it to manual and to "Yes" everything seem to work now

 

Thank you

 

Regards

View solution in original post