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Contributor
Contributor
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Registered: ‎04-21-2020

VPSS- CSC . Initialization successful but not seeing any subdevices

I have been trying to initialize vpss-csc. I have the following observation.

1. VPSS-CSC color depth probe successful.

But I am not seeing any /dev/v4l-subdev1.

Instead When I install the driver I see the

Scaler-bridge and vpsss scaler getting called.

 

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Moderator
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Registered: ‎11-09-2015

Hi @thenumberdevil 

Can you share your Device tree source file?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Contributor
Contributor
354 Views
Registered: ‎04-21-2020

@florentw  I discussed with my colleagues in the office. They advised me to get request for a private shared folder link where I can upload the files. Could you please share a link for the same.

Thank you for your support and quick response

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Moderator
Moderator
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Registered: ‎11-09-2015

HI @thenumberdevil 

I sent you a link you our FTP secured platform on your email address so you can upload your files.

Regards


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Contributor
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Registered: ‎04-21-2020

Hi @florentw ,

                          I have added the files in the secure platform. Thank you once again.

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Moderator
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Registered: ‎11-09-2015

Hi @thenumberdevil 

Your device tree looks correct.

Do you have CONFIG_VIDEO_XILINX_VPSS_CSC and CONFIG_VIDEO_XILINX enabled in the kernel config?

Do you see any error in the boot log related to the VPSS?

What is the output of the media-ctl command?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Registered: ‎04-21-2020

Hi @florentw ,

                       I have enabled the flags in the kernel menuconfig.

Do you see any error in the boot log related to the VPSS?

1.I see the CSC getting intialized properly but framebuffer_wg fails because of the GPIO reset. I have attached bootlog for your reference.

2.I have attached the output of the media-ctl command as well.

Please find the media-ctl output in the out.txt.

3. Probe deffered due  to GPIO reset defer. will that be causing issues.

Thank you

 

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Moderator
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Registered: ‎11-09-2015

HI @thenumberdevil 

It might be good to fix the issue with the video frame buffer. It might be that the node is not created because the sink (video frame buffer) is not ready.

I suggest you follow the recommendation of your other topic:

https://forums.xilinx.com/t5/Video-and-Audio/Xilinix-frmbuf-framebuffer-probe-failing/m-p/1136434#M33654

If the suggestion does not help, reply on the other topic I will try to help. 

Then once the video frame buffer driver is loaded correctly we can look back at the vpss driver


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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Contributor
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Registered: ‎04-21-2020

Hi @florentw ,

                        Thank you for the guidance.

1. From your answer each components in the pipeline are linked. So unless each of them are initialized the subsystem will not be visible.

2.The axi-reg-08 generated by the vivaldo is not complete. So I have to patch it up like a normal GPIO  controller(axi_gpio_control,axi_gpio_periphs). Since that provide the GPIO service to the framebuffer_wr.

Is my understanding correct?.

thenumberdevil_0-1596726015647.png

 

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Moderator
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Registered: ‎11-09-2015

Hi @thenumberdevil 

Yes I believe your understanding is correct


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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