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Adventurer
Adventurer
1,326 Views
Registered: ‎03-31-2020

VPSS Color Space Conversion boot error using V4L2 driver

Hello,

I could not boot the VPSS as Color Space Conversion Only IP using V4L2 VPSS CSC driver.

(https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80674831/Mem+2+Mem+VPSS-CSC+Composite+device)

I have been looking around but it seems there're some people got the same issues but not solved so far (eg. https://forums.xilinx.com/t5/Embedded-Linux/Mem-2-Mem-VPSS-CSC-Composite-device-wiki-example-issue/m-p/1017870)

In my case, the framebuffers probed successfully but the VPSS CSC did not.

Here is my device tree:

csc: vpss@0xa2200000 {
		compatible = "xlnx,v-vpss-csc";
		reg = <0x0 0xa2200000 0x0 0x40000>;
		clocks = <&misc_clk_0>;
                reset-gpios = <&gpio 80 1>;
		xlnx,dma-align = <16>;
		xlnx,max-height = <2160>;
		xlnx,max-width = <3840>;

		ports {
			 #address-cells = <1>;
			 #size-cells = <0>;
			/* Sink Pad */
			 port@0 {
				 reg = <0>;
				 /*XVIP_VF_YUV_420*/
				 xlnx,video-format = <2>;
				 xlnx,video-width = <8>;	 
				 csc_in: endpoint {
					         remote-endpoint = <&readbuffer_out>;
				 };
			};
			/* Source Pad */
			 port@1 {
				 reg = <1>;
				 /*XVIP_VF_RBG*/
				 xlnx,video-format = <2>;
				 xlnx,video-width = <8>;	 
				 csc_out: endpoint {
					         remote-endpoint = <&writebuffer_in>;
				 };
			 };
		};
	};
video_m2m {
		compatible = "xlnx,mem2mem";
		dmas = <&ctrlfbrd 0>, <&ctrlfbwr 0>;
		dma-names = "tx", "rx";		
		ports {
					 #address-cells = <1>;
					 #size-cells = <0>;
					 port@0 {
						 reg = <0>;
						 direction = "input";
				 		 writebuffer_in: endpoint {
						 			   remote-endpoint = <&csc_out>;
						 };
					};
				 
					 port@1 {
						 reg = <1>;
						 direction = "output";				
						 readbuffer_out: endpoint {
							 		   remote-endpoint = <&csc_in>;
						 };
				 
					};
		};	
	};

Here is the boot log

[    5.887717] xilinx-mem2mem amba_pl@0:video_m2m: mem2mem device registered
[    5.894713] xilinx-mem2mem amba_pl@0:video_m2m: Entity type for entity a2200000.vpss was not initialized!
[    5.904296] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
[    5.913068] Mem abort info:
[    5.915849]   ESR = 0x96000045
[    5.918892]   Exception class = DABT (current EL), IL = 32 bits
[    5.924803]   SET = 0, FnV = 0
[    5.927844]   EA = 0, S1PTW = 0
[    5.930973] Data abort info:
[    5.933847]   ISV = 0, ISS = 0x00000045
[    5.937675]   CM = 0, WnR = 1
[    5.940635] [0000000000000000] user address but active_mm is swapper
[    5.946982] Internal error: Oops: 96000045 [#1] SMP
[    5.951846] Modules linked in:
[    5.954895] CPU: 3 PID: 59 Comm: kworker/3:1 Not tainted 4.19.0-xilinx-v2019.1 #1
[    5.962365] Hardware name: ZynqMP ZCU104 RevC (DT)
[    5.967147] Workqueue: events deferred_probe_work_func
[    5.972270] pstate: 60000005 (nZCv daif -PAN -UAO)
[    5.977047] pc : media_add_link+0x44/0x58
[    5.981045] lr : media_add_link+0x30/0x58
[    5.985037] sp : ffffff800973b9a0
[    5.988335] x29: ffffff800973b9a0 x28: ffffffc07feeb348 
[    5.993639] x27: ffffffc037b47c18 x26: ffffffc07feead50 
[    5.998942] x25: 0000000000000001 x24: 0000000000000000 
[    6.004237] x23: 0000000000000038 x22: ffffffc037152100 
[    6.009532] x21: ffffffc038f5d018 x20: ffffffc037b47c18 
[    6.014827] x19: ffffffc038f5d068 x18: 0000000000000010 
[    6.020130] x17: 0000000000000000 x16: 0000000000000005 
[    6.025425] x15: ffffffffffffffff x14: 0000000000000000 
[    6.030719] x13: 0000000000000000 x12: 0000000000000000 
[    6.036014] x11: 0000000000000004 x10: 0101010101010101 
[    6.041309] x9 : 0000000000000000 x8 : ffffffc038265600 
[    6.046604] x7 : 0000000000000000 x6 : 000000000000003f 
[    6.051899] x5 : 0000000000000040 x4 : 0000000000000000 
[    6.057193] x3 : 0000000000000004 x2 : ffffffc0382655a0 
[    6.062488] x1 : 0000000000000000 x0 : ffffffc038265580 
[    6.067784] Process kworker/3:1 (pid: 59, stack limit = 0x(____ptrval____))
[    6.074727] Call trace:
[    6.077159]  media_add_link+0x44/0x58
[    6.080805]  media_create_pad_link+0xb0/0x168
[    6.085147]  xvip_graph_notify_complete+0x2d8/0x508
[    6.090016]  v4l2_async_notifier_try_complete.part.3+0x58/0x78
[    6.095839]  v4l2_async_register_subdev+0x100/0x1c8
[    6.100700]  xcsc_probe+0x49c/0x5f0
[    6.104172]  platform_drv_probe+0x58/0xa8
[    6.108165]  really_probe+0x1d8/0x290
[    6.111811]  driver_probe_device+0x5c/0xf0
[    6.115890]  __device_attach_driver+0xc0/0xf0
[    6.120230]  bus_for_each_drv+0x8c/0xd8
[    6.124049]  __device_attach+0xdc/0x138
[    6.127869]  device_initial_probe+0x24/0x30
[    6.132035]  bus_probe_device+0x9c/0xa8
[    6.135854]  deferred_probe_work_func+0x74/0xa8
[    6.140369]  process_one_work+0x208/0x430
[    6.144369]  worker_thread+0x250/0x490
[    6.148102]  kthread+0x130/0x138
[    6.151313]  ret_from_fork+0x10/0x1c
[    6.154873] Code: f9400661 91008002 f9000662 a9020413 (f9000022) 
[    6.160956] ---[ end trace ddca3dbdd7eae40d ]---
[    6.812346] [drm] Cannot find any crtc or sizes

 

Tags (1)
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23 Replies
Highlighted
Teacher
Teacher
1,279 Views
Registered: ‎06-16-2013

Hi @peakpeak 

 

According to kernel stack information, it seems device node name or device list issue on media graph during decoding dtb.

Make sure your v4l2 graph and media graph.

 

Best regards,

 

Highlighted
Adventurer
Adventurer
1,264 Views
Registered: ‎03-31-2020

Hi @watari ,

Could you please kindly elaborate? I have checked but could not know why it was wrong...

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Highlighted
Teacher
Teacher
1,177 Views
Registered: ‎06-16-2013

Hi @peakpeak 

 

[    5.904296] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
[    5.913068] Mem abort info:
[    5.915849]   ESR = 0x96000045
[    5.918892]   Exception class = DABT (current EL), IL = 32 bits
[    5.924803]   SET = 0, FnV = 0
[    5.927844]   EA = 0, S1PTW = 0
[    5.930973] Data abort info:
[    5.933847]   ISV = 0, ISS = 0x00000045
[    5.937675]   CM = 0, WnR = 1
[    5.940635] [0000000000000000] user address but active_mm is swapper
[    5.946982] Internal error: Oops: 96000045 [#1] SMP
[    5.951846] Modules linked in:
[    5.954895] CPU: 3 PID: 59 Comm: kworker/3:1 Not tainted 4.19.0-xilinx-v2019.1 #1
[    5.962365] Hardware name: ZynqMP ZCU104 RevC (DT)
[    5.967147] Workqueue: events deferred_probe_work_func
[    5.972270] pstate: 60000005 (nZCv daif -PAN -UAO)
[    5.977047] pc : media_add_link+0x44/0x58
[    5.981045] lr : media_add_link+0x30/0x58
[    5.985037] sp : ffffff800973b9a0
[    5.988335] x29: ffffff800973b9a0 x28: ffffffc07feeb348 
[    5.993639] x27: ffffffc037b47c18 x26: ffffffc07feead50 
[    5.998942] x25: 0000000000000001 x24: 0000000000000000 
[    6.004237] x23: 0000000000000038 x22: ffffffc037152100 
[    6.009532] x21: ffffffc038f5d018 x20: ffffffc037b47c18 
[    6.014827] x19: ffffffc038f5d068 x18: 0000000000000010 
[    6.020130] x17: 0000000000000000 x16: 0000000000000005 
[    6.025425] x15: ffffffffffffffff x14: 0000000000000000 
[    6.030719] x13: 0000000000000000 x12: 0000000000000000 
[    6.036014] x11: 0000000000000004 x10: 0101010101010101 
[    6.041309] x9 : 0000000000000000 x8 : ffffffc038265600 
[    6.046604] x7 : 0000000000000000 x6 : 000000000000003f 
[    6.051899] x5 : 0000000000000040 x4 : 0000000000000000 
[    6.057193] x3 : 0000000000000004 x2 : ffffffc0382655a0 
[    6.062488] x1 : 0000000000000000 x0 : ffffffc038265580 
[    6.067784] Process kworker/3:1 (pid: 59, stack limit = 0x(____ptrval____))
[    6.074727] Call trace:
[    6.077159]  media_add_link+0x44/0x58

 

According to this log, this issue was occured by a) or b). I guess b).

 

a)

https://github.com/Xilinx/linux-xlnx/blob/0bf5e5fe96bf3663f5d47e01d7f8d0e4d737e492/drivers/media/mc/mc-entity.c#L621

 

or

b)

https://github.com/Xilinx/linux-xlnx/blob/0bf5e5fe96bf3663f5d47e01d7f8d0e4d737e492/drivers/media/mc/mc-entity.c#L625

 

If a), kernel couldn't prepare required memory by kernel malloc.

If b), head was wrong parameter. In this case, it seems 0 by aarch64 ABI.

So, I mentioned you make sure media graph.

 

Would you make sure it ?

 

Best regards,

Highlighted
Adventurer
Adventurer
1,155 Views
Registered: ‎03-31-2020

Hi @watari,

Thanks for your response. But I still could not find the problem. I followed carefully the https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80674831/Mem+2+Mem+VPSS-CSC+Composite+device and could not find the root cause. It seems that the dtsi on the above link still has other relevant things that was not shown, but I could not figure it out (do you think I need to put something like a dummy node or something?).

I also checked the VCU TRD to learn about its media graph with VPSS but it seems different from my case.

I have played arout with the dtsi, and see that the VPSS with "xlnx,v-vpss-csc" probed OK, so it means the node itself was correct.

Without the VPSS (FB RD and FBWR connect directly), it was working OK. So, what else with the VPSS should I do? Could you please give me some hints? 

   

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Highlighted
Teacher
Teacher
1,135 Views
Registered: ‎06-16-2013

Hi @peakpeak 

 

Would you transfer your dtb file from FIT image file to dts by dtc ?

 

Best regards,

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Highlighted
Adventurer
Adventurer
1,107 Views
Registered: ‎03-31-2020

Hi @watari ,

Here it is

/dts-v1/;

/ {
	compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
	#address-cells = <0x2>;
	#size-cells = <0x2>;
	model = "ZynqMP ZCU104 RevC";

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			enable-method = "psci";
			operating-points-v2 = <0x1>;
			reg = <0x0>;
			cpu-idle-states = <0x2>;
			clocks = <0x3 0xa>;
		};

		cpu@1 {
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			enable-method = "psci";
			reg = <0x1>;
			operating-points-v2 = <0x1>;
			cpu-idle-states = <0x2>;
		};

		cpu@2 {
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			enable-method = "psci";
			reg = <0x2>;
			operating-points-v2 = <0x1>;
			cpu-idle-states = <0x2>;
		};

		cpu@3 {
			compatible = "arm,cortex-a53", "arm,armv8";
			device_type = "cpu";
			enable-method = "psci";
			reg = <0x3>;
			operating-points-v2 = <0x1>;
			cpu-idle-states = <0x2>;
		};

		idle-states {
			entry-method = "arm,psci";

			cpu-sleep-0 {
				compatible = "arm,idle-state";
				arm,psci-suspend-param = <0x40000000>;
				local-timer-stop;
				entry-latency-us = <0x12c>;
				exit-latency-us = <0x258>;
				min-residency-us = <0x2710>;
				phandle = <0x2>;
			};
		};
	};

	cpu_opp_table {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x1>;

		opp00 {
			opp-hz = <0x0 0x47868bf4>;
			opp-microvolt = <0xf4240>;
			clock-latency-ns = <0x7a120>;
		};

		opp01 {
			opp-hz = <0x0 0x23c345fa>;
			opp-microvolt = <0xf4240>;
			clock-latency-ns = <0x7a120>;
		};

		opp02 {
			opp-hz = <0x0 0x17d783fc>;
			opp-microvolt = <0xf4240>;
			clock-latency-ns = <0x7a120>;
		};

		opp03 {
			opp-hz = <0x0 0x11e1a2fd>;
			opp-microvolt = <0xf4240>;
			clock-latency-ns = <0x7a120>;
		};
	};

	dcc {
		compatible = "arm,dcc";
		status = "disabled";
		u-boot,dm-pre-reloc;
	};

	zynqmp_ipi {
		compatible = "xlnx,zynqmp-ipi-mailbox";
		interrupt-parent = <0x4>;
		interrupts = <0x0 0x23 0x4>;
		xlnx,ipi-id = <0x0>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		mailbox@ff990400 {
			reg = <0x0 0xff9905c0 0x0 0x20 0x0 0xff9905e0 0x0 0x20 0x0 0xff990e80 0x0 0x20 0x0 0xff990ea0 0x0 0x20>;
			reg-names = "local_request_region", "local_response_region", "remote_request_region", "remote_response_region";
			#mbox-cells = <0x1>;
			xlnx,ipi-id = <0x4>;
			phandle = <0x5>;
		};
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupt-parent = <0x4>;
		interrupts = <0x0 0x8f 0x4 0x0 0x90 0x4 0x0 0x91 0x4 0x0 0x92 0x4>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	firmware {

		zynqmp-firmware {
			compatible = "xlnx,zynqmp-firmware";
			u-boot,dm-pre-reloc;
			method = "smc";
			#power-domain-cells = <0x1>;
			phandle = <0xc>;

			zynqmp-power {
				compatible = "xlnx,zynqmp-power";
				interrupt-parent = <0x4>;
				interrupts = <0x0 0x23 0x4>;
				mboxes = <0x5 0x0 0x5 0x1>;
				mbox-names = "tx", "rx";
			};

			reset-controller {
				compatible = "xlnx,zynqmp-reset";
				#reset-cells = <0x1>;
				phandle = <0x17>;
			};

			pinctrl {
				compatible = "xlnx,zynqmp-pinctrl";
				status = "okay";

				can1-default {
					phandle = <0xd>;

					mux {
						function = "can1";
						groups = "can1_6_grp";
					};

					conf {
						groups = "can1_6_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};

					conf-rx {
						pins = "MIO25";
						bias-high-impedance;
					};

					conf-tx {
						pins = "MIO24";
						bias-disable;
					};
				};

				i2c1-default {
					phandle = <0x11>;

					mux {
						groups = "i2c1_4_grp";
						function = "i2c1";
					};

					conf {
						groups = "i2c1_4_grp";
						bias-pull-up;
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};
				};

				i2c1-gpio {
					phandle = <0x12>;

					mux {
						groups = "gpio0_16_grp", "gpio0_17_grp";
						function = "gpio0";
					};

					conf {
						groups = "gpio0_16_grp", "gpio0_17_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};
				};

				gem3-default {
					phandle = <0x10>;

					mux {
						function = "ethernet3";
						groups = "ethernet3_0_grp";
					};

					conf {
						groups = "ethernet3_0_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};

					conf-rx {
						pins = "MIO70", "MIO71", "MIO72", "MIO73", "MIO74", "MIO75";
						bias-high-impedance;
						low-power-disable;
					};

					conf-tx {
						pins = "MIO64", "MIO65", "MIO66", "MIO67", "MIO68", "MIO69";
						bias-disable;
						low-power-enable;
					};

					mux-mdio {
						function = "mdio3";
						groups = "mdio3_0_grp";
					};

					conf-mdio {
						groups = "mdio3_0_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						bias-disable;
					};
				};

				sdhci1-default {
					phandle = <0x19>;

					mux {
						groups = "sdio1_0_grp";
						function = "sdio1";
					};

					conf {
						groups = "sdio1_0_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						bias-disable;
						drive-strength = <0xc>;
					};

					mux-cd {
						groups = "sdio1_cd_0_grp";
						function = "sdio1_cd";
					};

					conf-cd {
						groups = "sdio1_cd_0_grp";
						bias-high-impedance;
						bias-pull-up;
						slew-rate = <0x1>;
						io-standard = <0x1>;
					};
				};

				uart0-default {
					phandle = <0x1a>;

					mux {
						groups = "uart0_4_grp";
						function = "uart0";
					};

					conf {
						groups = "uart0_4_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};

					conf-rx {
						pins = "MIO18";
						bias-high-impedance;
					};

					conf-tx {
						pins = "MIO19";
						bias-disable;
					};
				};

				uart1-default {
					phandle = <0x1b>;

					mux {
						groups = "uart1_5_grp";
						function = "uart1";
					};

					conf {
						groups = "uart1_5_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};

					conf-rx {
						pins = "MIO21";
						bias-high-impedance;
					};

					conf-tx {
						pins = "MIO20";
						bias-disable;
					};
				};

				usb0-default {
					phandle = <0x1c>;

					mux {
						groups = "usb0_0_grp";
						function = "usb0";
					};

					conf {
						groups = "usb0_0_grp";
						slew-rate = <0x1>;
						io-standard = <0x1>;
						drive-strength = <0xc>;
					};

					conf-rx {
						pins = "MIO52", "MIO53", "MIO55";
						bias-high-impedance;
					};

					conf-tx {
						pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59", "MIO60", "MIO61", "MIO62", "MIO63";
						bias-disable;
					};
				};
			};

			clock-controller {
				u-boot,dm-pre-reloc;
				#clock-cells = <0x1>;
				compatible = "xlnx,zynqmp-clk";
				clocks = <0x6 0x7 0x8 0x9 0xa>;
				clock-names = "pss_ref_clk", "video_clk", "pss_alt_ref_clk", "aux_ref_clk", "gt_crx_ref_clk";
				phandle = <0x3>;
			};
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <0x4>;
		interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
	};

	edac {
		compatible = "arm,cortex-a53-edac";
	};

	fpga-full {
		compatible = "fpga-region";
		fpga-mgr = <0xb>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
	};

	nvmem_firmware {
		compatible = "xlnx,zynqmp-nvmem-fw";
		#address-cells = <0x1>;
		#size-cells = <0x1>;

		soc_revision@0 {
			reg = <0x0 0x4>;
			phandle = <0x16>;
		};

		efuse_dna@c {
			reg = <0xc 0xc>;
		};

		efuse_usr0@20 {
			reg = <0x20 0x4>;
		};

		efuse_usr1@24 {
			reg = <0x24 0x4>;
		};

		efuse_usr2@28 {
			reg = <0x28 0x4>;
		};

		efuse_usr3@2c {
			reg = <0x2c 0x4>;
		};

		efuse_usr4@30 {
			reg = <0x30 0x4>;
		};

		efuse_usr5@34 {
			reg = <0x34 0x4>;
		};

		efuse_usr6@38 {
			reg = <0x38 0x4>;
		};

		efuse_usr7@3c {
			reg = <0x3c 0x4>;
		};

		efuse_miscusr@40 {
			reg = <0x40 0x4>;
		};

		efuse_chash@50 {
			reg = <0x50 0x4>;
		};

		efuse_pufmisc@54 {
			reg = <0x54 0x4>;
		};

		efuse_sec@58 {
			reg = <0x58 0x4>;
		};

		efuse_spkid@5c {
			reg = <0x5c 0x4>;
		};

		efuse_ppk0hash@a0 {
			reg = <0xa0 0x30>;
		};

		efuse_ppk1hash@d0 {
			reg = <0xd0 0x30>;
		};
	};

	pcap {
		compatible = "xlnx,zynqmp-pcap-fpga";
		clock-names = "ref_clk";
		clocks = <0x3 0x29>;
		phandle = <0xb>;
	};

	zynqmp_rsa {
		compatible = "xlnx,zynqmp-rsa";
	};

	sha384 {
		compatible = "xlnx,zynqmp-keccak-384";
	};

	zynqmp_aes {
		compatible = "xlnx,zynqmp-aes";
	};

	amba_apu@0 {
		compatible = "simple-bus";
		#address-cells = <0x2>;
		#size-cells = <0x1>;
		ranges = <0x0 0x0 0x0 0x0 0xffffffff>;

		interrupt-controller@f9010000 {
			compatible = "arm,gic-400", "arm,cortex-a15-gic";
			#interrupt-cells = <0x3>;
			reg = <0x0 0xf9010000 0x10000 0x0 0xf9020000 0x20000 0x0 0xf9040000 0x20000 0x0 0xf9060000 0x20000>;
			interrupt-controller;
			interrupt-parent = <0x4>;
			interrupts = <0x1 0x9 0xf04>;
			num_cpus = <0x2>;
			num_interrupts = <0x60>;
			phandle = <0x4>;
		};
	};

	smmu@fd800000 {
		compatible = "arm,mmu-500";
		reg = <0x0 0xfd800000 0x0 0x20000>;
		#iommu-cells = <0x1>;
		status = "disabled";
		#global-interrupts = <0x1>;
		interrupt-parent = <0x4>;
		interrupts = <0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4 0x0 0x9b 0x4>;
		phandle = <0xe>;
	};

	amba {
		compatible = "simple-bus";
		u-boot,dm-pre-reloc;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		ranges;

		can@ff060000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "disabled";
			clock-names = "can_clk", "pclk";
			reg = <0x0 0xff060000 0x0 0x1000>;
			interrupts = <0x0 0x17 0x4>;
			interrupt-parent = <0x4>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
			power-domains = <0xc 0x2f>;
			clocks = <0x3 0x3f 0x3 0x1f>;
		};

		can@ff070000 {
			compatible = "xlnx,zynq-can-1.0";
			status = "okay";
			clock-names = "can_clk", "pclk";
			reg = <0x0 0xff070000 0x0 0x1000>;
			interrupts = <0x0 0x18 0x4>;
			interrupt-parent = <0x4>;
			tx-fifo-depth = <0x40>;
			rx-fifo-depth = <0x40>;
			power-domains = <0xc 0x30>;
			clocks = <0x3 0x40 0x3 0x1f>;
			pinctrl-names = "default";
			pinctrl-0 = <0xd>;
		};

		cci@fd6e0000 {
			compatible = "arm,cci-400";
			reg = <0x0 0xfd6e0000 0x0 0x9000>;
			ranges = <0x0 0x0 0xfd6e0000 0x10000>;
			#address-cells = <0x1>;
			#size-cells = <0x1>;

			pmu@9000 {
				compatible = "arm,cci-400-pmu,r1";
				reg = <0x9000 0x5000>;
				interrupt-parent = <0x4>;
				interrupts = <0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4 0x0 0x7b 0x4>;
			};
		};

		dma@fd500000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd500000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x7c 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14e8>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd510000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd510000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x7d 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14e9>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd520000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd520000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x7e 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14ea>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd530000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd530000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x7f 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14eb>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd540000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd540000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x80 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14ec>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd550000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd550000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x81 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14ed>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd560000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd560000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x82 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14ee>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		dma@fd570000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xfd570000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x83 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x80>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x14ef>;
			power-domains = <0xc 0x2a>;
			clocks = <0x3 0x13 0x3 0x1f>;
		};

		gpu@fd4b0000 {
			status = "okay";
			compatible = "arm,mali-400", "arm,mali-utgard";
			reg = <0x0 0xfd4b0000 0x0 0x10000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4 0x0 0x84 0x4>;
			interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
			clock-names = "gpu", "gpu_pp0", "gpu_pp1";
			power-domains = <0xc 0x3a>;
			clocks = <0x3 0x18 0x3 0x19 0x3 0x1a>;
			xlnx,tz-nonsecure = <0x1>;
		};

		dma@ffa80000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffa80000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x4d 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffa90000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffa90000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x4e 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffaa0000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffaa0000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x4f 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffab0000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffab0000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x50 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffac0000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffac0000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x51 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffad0000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffad0000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x52 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffae0000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffae0000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x53 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		dma@ffaf0000 {
			status = "okay";
			compatible = "xlnx,zynqmp-dma-1.0";
			reg = <0x0 0xffaf0000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x54 0x4>;
			clock-names = "clk_main", "clk_apb";
			xlnx,bus-width = <0x40>;
			#stream-id-cells = <0x1>;
			power-domains = <0xc 0x2b>;
			clocks = <0x3 0x44 0x3 0x1f>;
		};

		memory-controller@fd070000 {
			compatible = "xlnx,zynqmp-ddrc-2.40a";
			reg = <0x0 0xfd070000 0x0 0x30000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x70 0x4>;
		};

		nand@ff100000 {
			compatible = "arasan,nfc-v3p10";
			status = "disabled";
			reg = <0x0 0xff100000 0x0 0x1000>;
			clock-names = "clk_sys", "clk_flash";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0xe 0x4>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x872>;
			power-domains = <0xc 0x2c>;
			clocks = <0x3 0x3c 0x3 0x1f>;
		};

		ethernet@ff0b0000 {
			compatible = "cdns,zynqmp-gem", "cdns,gem";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x39 0x4 0x0 0x39 0x4>;
			reg = <0x0 0xff0b0000 0x0 0x1000>;
			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x874>;
			power-domains = <0xc 0x1d>;
			clocks = <0x3 0x1f 0x3 0x68 0x3 0x2d 0x3 0x31 0x3 0x2c>;
		};

		ethernet@ff0c0000 {
			compatible = "cdns,zynqmp-gem", "cdns,gem";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x3b 0x4 0x0 0x3b 0x4>;
			reg = <0x0 0xff0c0000 0x0 0x1000>;
			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x875>;
			power-domains = <0xc 0x1e>;
			clocks = <0x3 0x1f 0x3 0x69 0x3 0x2e 0x3 0x32 0x3 0x2c>;
		};

		ethernet@ff0d0000 {
			compatible = "cdns,zynqmp-gem", "cdns,gem";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x3d 0x4 0x0 0x3d 0x4>;
			reg = <0x0 0xff0d0000 0x0 0x1000>;
			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x876>;
			power-domains = <0xc 0x1f>;
			clocks = <0x3 0x1f 0x3 0x6a 0x3 0x2f 0x3 0x33 0x3 0x2c>;
		};

		ethernet@ff0e0000 {
			compatible = "cdns,zynqmp-gem", "cdns,gem";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x3f 0x4 0x0 0x3f 0x4>;
			reg = <0x0 0xff0e0000 0x0 0x1000>;
			clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x877>;
			power-domains = <0xc 0x20>;
			clocks = <0x3 0x1f 0x3 0x6b 0x3 0x30 0x3 0x34 0x3 0x2c>;
			phy-handle = <0xf>;
			pinctrl-names = "default";
			pinctrl-0 = <0x10>;
			phy-mode = "rgmii-id";
			xlnx,ptp-enet-clock = <0x0>;
			local-mac-address = [00 0a 35 00 22 01];

			phy@c {
				reg = <0xc>;
				ti,rx-internal-delay = <0x8>;
				ti,tx-internal-delay = <0xa>;
				ti,fifo-depth = <0x1>;
				ti,dp83867-rxctrl-strap-quirk;
				phandle = <0xf>;
			};
		};

		gpio@ff0a0000 {
			compatible = "xlnx,zynqmp-gpio-1.0";
			status = "okay";
			#gpio-cells = <0x2>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x10 0x4>;
			interrupt-controller;
			#interrupt-cells = <0x2>;
			reg = <0x0 0xff0a0000 0x0 0x1000>;
			gpio-controller;
			power-domains = <0xc 0x2e>;
			clocks = <0x3 0x1f>;
			emio-gpio-width = <0x20>;
			gpio-mask-high = <0x0>;
			gpio-mask-low = <0x5600>;
			phandle = <0x13>;
		};

		i2c@ff020000 {
			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x11 0x4>;
			reg = <0x0 0xff020000 0x0 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			power-domains = <0xc 0x25>;
			clocks = <0x3 0x3d>;
		};

		i2c@ff030000 {
			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x12 0x4>;
			reg = <0x0 0xff030000 0x0 0x1000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			power-domains = <0xc 0x26>;
			clocks = <0x3 0x3e>;
			pinctrl-names = "default", "gpio";
			pinctrl-0 = <0x11>;
			pinctrl-1 = <0x12>;
			scl-gpios = <0x13 0x10 0x0>;
			sda-gpios = <0x13 0x11 0x0>;
			clock-frequency = <0x61a80>;

			gpio@20 {
				compatible = "ti,tca6416";
				reg = <0x20>;
				gpio-controller;
				#gpio-cells = <0x2>;
			};

			i2c-mux@74 {
				compatible = "nxp,pca9548";
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				reg = <0x74>;

				i2c@0 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x0>;
				};

				i2c@1 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x1>;

					clock-generator@6c {
						compatible = "idt,8t49n287";
						reg = <0x6c>;
					};

					eeprom@54 {
						compatible = "atmel,24c08";
						reg = <0x54>;
						#address-cells = <0x1>;
						#size-cells = <0x1>;
					};
				};

				i2c@2 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x2>;

					irps54012@43 {
						#clock-cells = <0x0>;
						compatible = "infineon,irps5401";
						reg = <0x43>;
					};

					irps54012@4d {
						#clock-cells = <0x0>;
						compatible = "infineon,irps5401";
						reg = <0x4d>;
					};
				};

				i2c@3 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x3>;

					ina226@40 {
						compatible = "ti,ina226";
						reg = <0x40>;
						shunt-resistor = <0x1388>;
					};
				};

				i2c@5 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x5>;
				};

				i2c@7 {
					#address-cells = <0x1>;
					#size-cells = <0x0>;
					reg = <0x7>;
				};
			};
		};

		memory-controller@ff960000 {
			compatible = "xlnx,zynqmp-ocmc-1.0";
			reg = <0x0 0xff960000 0x0 0x1000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0xa 0x4>;
		};

		perf-monitor@ffa00000 {
			compatible = "xlnx,axi-perf-monitor";
			reg = <0x0 0xffa00000 0x0 0x10000>;
			interrupts = <0x0 0x19 0x4>;
			interrupt-parent = <0x4>;
			xlnx,enable-profile = <0x0>;
			xlnx,enable-trace = <0x0>;
			xlnx,num-monitor-slots = <0x1>;
			xlnx,enable-event-count = <0x1>;
			xlnx,enable-event-log = <0x1>;
			xlnx,have-sampled-metric-cnt = <0x1>;
			xlnx,num-of-counters = <0x8>;
			xlnx,metric-count-width = <0x20>;
			xlnx,metrics-sample-count-width = <0x20>;
			xlnx,global-count-width = <0x20>;
			xlnx,metric-count-scale = <0x1>;
			clocks = <0x3 0x1f>;
		};

		perf-monitor@fd0b0000 {
			compatible = "xlnx,axi-perf-monitor";
			reg = <0x0 0xfd0b0000 0x0 0x10000>;
			interrupts = <0x0 0x7b 0x4>;
			interrupt-parent = <0x4>;
			xlnx,enable-profile = <0x0>;
			xlnx,enable-trace = <0x0>;
			xlnx,num-monitor-slots = <0x6>;
			xlnx,enable-event-count = <0x1>;
			xlnx,enable-event-log = <0x0>;
			xlnx,have-sampled-metric-cnt = <0x1>;
			xlnx,num-of-counters = <0xa>;
			xlnx,metric-count-width = <0x20>;
			xlnx,metrics-sample-count-width = <0x20>;
			xlnx,global-count-width = <0x20>;
			xlnx,metric-count-scale = <0x1>;
			clocks = <0x3 0x1c>;
		};

		perf-monitor@fd490000 {
			compatible = "xlnx,axi-perf-monitor";
			reg = <0x0 0xfd490000 0x0 0x10000>;
			interrupts = <0x0 0x7b 0x4>;
			interrupt-parent = <0x4>;
			xlnx,enable-profile = <0x0>;
			xlnx,enable-trace = <0x0>;
			xlnx,num-monitor-slots = <0x1>;
			xlnx,enable-event-count = <0x1>;
			xlnx,enable-event-log = <0x0>;
			xlnx,have-sampled-metric-cnt = <0x1>;
			xlnx,num-of-counters = <0x8>;
			xlnx,metric-count-width = <0x20>;
			xlnx,metrics-sample-count-width = <0x20>;
			xlnx,global-count-width = <0x20>;
			xlnx,metric-count-scale = <0x1>;
			clocks = <0x3 0x1c>;
		};

		perf-monitor@ffa10000 {
			compatible = "xlnx,axi-perf-monitor";
			reg = <0x0 0xffa10000 0x0 0x10000>;
			interrupts = <0x0 0x19 0x4>;
			interrupt-parent = <0x4>;
			xlnx,enable-profile = <0x0>;
			xlnx,enable-trace = <0x0>;
			xlnx,num-monitor-slots = <0x1>;
			xlnx,enable-event-count = <0x1>;
			xlnx,enable-event-log = <0x1>;
			xlnx,have-sampled-metric-cnt = <0x1>;
			xlnx,num-of-counters = <0x8>;
			xlnx,metric-count-width = <0x20>;
			xlnx,metrics-sample-count-width = <0x20>;
			xlnx,global-count-width = <0x20>;
			xlnx,metric-count-scale = <0x1>;
			clocks = <0x3 0x1f>;
		};

		pcie@fd0e0000 {
			compatible = "xlnx,nwl-pcie-2.11";
			status = "disabled";
			#address-cells = <0x3>;
			#size-cells = <0x2>;
			#interrupt-cells = <0x1>;
			msi-controller;
			device_type = "pci";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x76 0x4 0x0 0x75 0x4 0x0 0x74 0x4 0x0 0x73 0x4 0x0 0x72 0x4>;
			interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";
			msi-parent = <0x14>;
			reg = <0x0 0xfd0e0000 0x0 0x1000 0x0 0xfd480000 0x0 0x1000 0x80 0x0 0x0 0x1000000>;
			reg-names = "breg", "pcireg", "cfg";
			ranges = <0x2000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000 0x43000000 0x6 0x0 0x6 0x0 0x2 0x0>;
			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
			bus-range = <0x0 0xff>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x15 0x1 0x0 0x0 0x0 0x2 0x15 0x2 0x0 0x0 0x0 0x3 0x15 0x3 0x0 0x0 0x0 0x4 0x15 0x4>;
			power-domains = <0xc 0x3b>;
			clocks = <0x3 0x17>;
			phandle = <0x14>;

			legacy-interrupt-controller {
				interrupt-controller;
				#address-cells = <0x0>;
				#interrupt-cells = <0x1>;
				phandle = <0x15>;
			};
		};

		spi@ff0f0000 {
			u-boot,dm-pre-reloc;
			compatible = "xlnx,zynqmp-qspi-1.0";
			status = "okay";
			clock-names = "ref_clk", "pclk";
			interrupts = <0x0 0xf 0x4>;
			interrupt-parent = <0x4>;
			num-cs = <0x1>;
			reg = <0x0 0xff0f0000 0x0 0x1000 0x0 0xc0000000 0x0 0x8000000>;
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x873>;
			power-domains = <0xc 0x2d>;
			clocks = <0x3 0x35 0x3 0x1f>;
			is-dual = <0x0>;
			spi-rx-bus-width = <0x4>;
			spi-tx-bus-width = <0x4>;

			flash@0 {
				compatible = "n25q512a", "micron,m25p80";
				#address-cells = <0x1>;
				#size-cells = <0x1>;
				reg = <0x0>;
				spi-tx-bus-width = <0x1>;
				spi-rx-bus-width = <0x4>;
				spi-max-frequency = <0x66ff300>;

				partition@0x00000000 {
					label = "boot";
					reg = <0x0 0x1e00000>;
				};

				partition@0x01e00000 {
					label = "bootenv";
					reg = <0x1e00000 0x40000>;
				};

				partition@0x01e40000 {
					label = "kernel";
					reg = <0x1e40000 0x21c0000>;
				};
			};
		};

		rtc@ffa60000 {
			compatible = "xlnx,zynqmp-rtc";
			status = "okay";
			reg = <0x0 0xffa60000 0x0 0x100>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x1a 0x4 0x0 0x1b 0x4>;
			interrupt-names = "alarm", "sec";
			calibration = <0x8000>;
		};

		zynqmp_phy@fd400000 {
			compatible = "xlnx,zynqmp-psgtr-v1.1";
			status = "okay";
			reg = <0x0 0xfd400000 0x0 0x40000 0x0 0xfd3d0000 0x0 0x1000>;
			reg-names = "serdes", "siou";
			nvmem-cells = <0x16>;
			nvmem-cell-names = "soc_revision";
			resets = <0x17 0x10 0x17 0x3b 0x17 0x3c 0x17 0x3d 0x17 0x3e 0x17 0x3f 0x17 0x40 0x17 0x3 0x17 0x1d 0x17 0x1e 0x17 0x1f 0x17 0x20>;
			reset-names = "sata_rst", "usb0_crst", "usb1_crst", "usb0_hibrst", "usb1_hibrst", "usb0_apbrst", "usb1_apbrst", "dp_rst", "gem0_rst", "gem1_rst", "gem2_rst", "gem3_rst";

			lane0 {
				#phy-cells = <0x4>;
				phandle = <0x20>;
			};

			lane1 {
				#phy-cells = <0x4>;
				phandle = <0x1f>;
			};

			lane2 {
				#phy-cells = <0x4>;
				phandle = <0x1d>;
			};

			lane3 {
				#phy-cells = <0x4>;
				phandle = <0x18>;
			};
		};

		ahci@fd0c0000 {
			compatible = "ceva,ahci-1v84";
			status = "okay";
			reg = <0x0 0xfd0c0000 0x0 0x2000>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x85 0x4>;
			power-domains = <0xc 0x1c>;
			#stream-id-cells = <0x4>;
			clocks = <0x3 0x16>;
			ceva,p0-cominit-params = <0x18401828>;
			ceva,p0-comwake-params = <0x614080e>;
			ceva,p0-burst-params = <0x13084a06>;
			ceva,p0-retry-params = <0x96a43ffc>;
			ceva,p1-cominit-params = <0x18401828>;
			ceva,p1-comwake-params = <0x614080e>;
			ceva,p1-burst-params = <0x13084a06>;
			ceva,p1-retry-params = <0x96a43ffc>;
			phy-names = "sata-phy";
			phys = <0x18 0x1 0x1 0x1 0x7735940>;
			xlnx,tz-nonsecure-sata0 = <0x0>;
			xlnx,tz-nonsecure-sata1 = <0x0>;
			dma-coherent;
		};

		mmc@ff160000 {
			u-boot,dm-pre-reloc;
			compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x30 0x4>;
			reg = <0x0 0xff160000 0x0 0x1000>;
			clock-names = "clk_xin", "clk_ahb";
			xlnx,device_id = <0x0>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x870>;
			power-domains = <0xc 0x27>;
			clocks = <0x3 0x36 0x3 0x1f>;
		};

		mmc@ff170000 {
			u-boot,dm-pre-reloc;
			compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x31 0x4>;
			reg = <0x0 0xff170000 0x0 0x1000>;
			clock-names = "clk_xin", "clk_ahb";
			xlnx,device_id = <0x1>;
			#stream-id-cells = <0x1>;
			iommus = <0xe 0x871>;
			power-domains = <0xc 0x28>;
			clocks = <0x3 0x37 0x3 0x1f>;
			no-1-8-v;
			pinctrl-names = "default";
			pinctrl-0 = <0x19>;
			xlnx,mio_bank = <0x1>;
			disable-wp;
			clock-frequency = <0xb2d05e0>;
		};

		spi@ff040000 {
			compatible = "cdns,spi-r1p6";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x13 0x4>;
			reg = <0x0 0xff040000 0x0 0x1000>;
			clock-names = "ref_clk", "pclk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			power-domains = <0xc 0x23>;
			clocks = <0x3 0x3a 0x3 0x1f>;
		};

		spi@ff050000 {
			compatible = "cdns,spi-r1p6";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x14 0x4>;
			reg = <0x0 0xff050000 0x0 0x1000>;
			clock-names = "ref_clk", "pclk";
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			power-domains = <0xc 0x24>;
			clocks = <0x3 0x3b 0x3 0x1f>;
		};

		timer@ff110000 {
			compatible = "cdns,ttc";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x24 0x4 0x0 0x25 0x4 0x0 0x26 0x4>;
			reg = <0x0 0xff110000 0x0 0x1000>;
			timer-width = <0x20>;
			power-domains = <0xc 0x18>;
			clocks = <0x3 0x1f>;
		};

		timer@ff120000 {
			compatible = "cdns,ttc";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x27 0x4 0x0 0x28 0x4 0x0 0x29 0x4>;
			reg = <0x0 0xff120000 0x0 0x1000>;
			timer-width = <0x20>;
			power-domains = <0xc 0x19>;
			clocks = <0x3 0x1f>;
		};

		timer@ff130000 {
			compatible = "cdns,ttc";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x2a 0x4 0x0 0x2b 0x4 0x0 0x2c 0x4>;
			reg = <0x0 0xff130000 0x0 0x1000>;
			timer-width = <0x20>;
			power-domains = <0xc 0x1a>;
			clocks = <0x3 0x1f>;
		};

		timer@ff140000 {
			compatible = "cdns,ttc";
			status = "disabled";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4 0x0 0x2f 0x4>;
			reg = <0x0 0xff140000 0x0 0x1000>;
			timer-width = <0x20>;
			power-domains = <0xc 0x1b>;
			clocks = <0x3 0x1f>;
		};

		serial@ff000000 {
			u-boot,dm-pre-reloc;
			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x15 0x4>;
			reg = <0x0 0xff000000 0x0 0x1000>;
			clock-names = "uart_clk", "pclk";
			power-domains = <0xc 0x21>;
			clocks = <0x3 0x38 0x3 0x1f>;
			pinctrl-names = "default";
			pinctrl-0 = <0x1a>;
			cts-override;
			device_type = "serial";
			port-number = <0x0>;
		};

		serial@ff010000 {
			u-boot,dm-pre-reloc;
			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x16 0x4>;
			reg = <0x0 0xff010000 0x0 0x1000>;
			clock-names = "uart_clk", "pclk";
			power-domains = <0xc 0x22>;
			clocks = <0x3 0x39 0x3 0x1f>;
			pinctrl-names = "default";
			pinctrl-0 = <0x1b>;
			cts-override;
			device_type = "serial";
			port-number = <0x1>;
		};

		usb0@ff9d0000 {
			#address-cells = <0x2>;
			#size-cells = <0x2>;
			status = "okay";
			compatible = "xlnx,zynqmp-dwc3";
			reg = <0x0 0xff9d0000 0x0 0x100>;
			clock-names = "bus_clk", "ref_clk";
			power-domains = <0xc 0x16>;
			ranges;
			nvmem-cells = <0x16>;
			nvmem-cell-names = "soc_revision";
			clocks = <0x3 0x20 0x3 0x22>;
			pinctrl-names = "default";
			pinctrl-0 = <0x1c>;
			xlnx,tz-nonsecure = <0x1>;
			xlnx,usb-polarity = <0x0>;
			xlnx,usb-reset-mode = <0x0>;

			dwc3@fe200000 {
				compatible = "snps,dwc3";
				status = "okay";
				reg = <0x0 0xfe200000 0x0 0x40000>;
				interrupt-parent = <0x4>;
				interrupt-names = "dwc_usb3", "otg", "hiber";
				interrupts = <0x0 0x41 0x4 0x0 0x45 0x4 0x0 0x4b 0x4>;
				#stream-id-cells = <0x1>;
				iommus = <0xe 0x860>;
				snps,quirk-frame-length-adjustment = <0x20>;
				snps,refclk_fladj;
				snps,enable_guctl1_resume_quirk;
				snps,enable_guctl1_ipd_quirk;
				snps,xhci-stream-quirk;
				dr_mode = "host";
				snps,usb3_lpm_capable;
				phy-names = "usb3-phy";
				phys = <0x1d 0x4 0x0 0x2 0x18cba80>;
				maximum-speed = "super-speed";
			};
		};

		usb1@ff9e0000 {
			#address-cells = <0x2>;
			#size-cells = <0x2>;
			status = "disabled";
			compatible = "xlnx,zynqmp-dwc3";
			reg = <0x0 0xff9e0000 0x0 0x100>;
			clock-names = "bus_clk", "ref_clk";
			power-domains = <0xc 0x17>;
			ranges;
			nvmem-cells = <0x16>;
			nvmem-cell-names = "soc_revision";
			clocks = <0x3 0x21 0x3 0x22>;

			dwc3@fe300000 {
				compatible = "snps,dwc3";
				status = "disabled";
				reg = <0x0 0xfe300000 0x0 0x40000>;
				interrupt-parent = <0x4>;
				interrupt-names = "dwc_usb3", "otg", "hiber";
				interrupts = <0x0 0x46 0x4 0x0 0x4a 0x4 0x0 0x4c 0x4>;
				#stream-id-cells = <0x1>;
				iommus = <0xe 0x861>;
				snps,quirk-frame-length-adjustment = <0x20>;
				snps,refclk_fladj;
				snps,enable_guctl1_resume_quirk;
				snps,enable_guctl1_ipd_quirk;
				snps,xhci-stream-quirk;
			};
		};

		watchdog@fd4d0000 {
			compatible = "cdns,wdt-r1p2";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x71 0x1>;
			reg = <0x0 0xfd4d0000 0x0 0x1000>;
			timeout-sec = <0x3c>;
			reset-on-timeout;
			clocks = <0x3 0x4b>;
		};

		watchdog@ff150000 {
			compatible = "cdns,wdt-r1p2";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x34 0x1>;
			reg = <0x0 0xff150000 0x0 0x1000>;
			timeout-sec = <0xa>;
			clocks = <0x3 0x70>;
		};

		ams@ffa50000 {
			compatible = "xlnx,zynqmp-ams";
			status = "okay";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x38 0x4>;
			interrupt-names = "ams-irq";
			reg = <0x0 0xffa50000 0x0 0x800>;
			reg-names = "ams-base";
			#address-cells = <0x2>;
			#size-cells = <0x2>;
			#io-channel-cells = <0x1>;
			ranges;
			clocks = <0x3 0x46>;

			ams_ps@ffa50800 {
				compatible = "xlnx,zynqmp-ams-ps";
				status = "okay";
				reg = <0x0 0xffa50800 0x0 0x400>;
			};

			ams_pl@ffa50c00 {
				compatible = "xlnx,zynqmp-ams-pl";
				status = "okay";
				reg = <0x0 0xffa50c00 0x0 0x400>;
			};
		};

		dma@fd4c0000 {
			compatible = "xlnx,dpdma";
			status = "okay";
			reg = <0x0 0xfd4c0000 0x0 0x1000>;
			interrupts = <0x0 0x7a 0x4>;
			interrupt-parent = <0x4>;
			clock-names = "axi_clk";
			power-domains = <0xc 0x29>;
			dma-channels = <0x6>;
			#dma-cells = <0x1>;
			clocks = <0x3 0x14>;
			phandle = <0x21>;

			dma-video0channel {
				compatible = "xlnx,video0";
			};

			dma-video1channel {
				compatible = "xlnx,video1";
			};

			dma-video2channel {
				compatible = "xlnx,video2";
			};

			dma-graphicschannel {
				compatible = "xlnx,graphics";
			};

			dma-audio0channel {
				compatible = "xlnx,audio0";
			};

			dma-audio1channel {
				compatible = "xlnx,audio1";
			};
		};

		zynqmp-display@fd4a0000 {
			compatible = "xlnx,zynqmp-dpsub-1.7";
			status = "okay";
			reg = <0x0 0xfd4a0000 0x0 0x1000 0x0 0xfd4aa000 0x0 0x1000 0x0 0xfd4ab000 0x0 0x1000 0x0 0xfd4ac000 0x0 0x1000>;
			reg-names = "dp", "blend", "av_buf", "aud";
			interrupts = <0x0 0x77 0x4>;
			interrupt-parent = <0x4>;
			clock-names = "dp_apb_clk", "dp_aud_clk", "dp_vtc_pixel_clk_in";
			power-domains = <0xc 0x29>;
			clocks = <0x1e 0x3 0x11 0x3 0x10>;
			phy-names = "dp-phy0", "dp-phy1";
			phys = <0x1f 0x6 0x0 0x3 0x19bfcc0 0x20 0x6 0x1 0x3 0x19bfcc0>;
			xlnx,max-lanes = <0x2>;

			vid-layer {
				dma-names = "vid0", "vid1", "vid2";
				dmas = <0x21 0x0 0x21 0x1 0x21 0x2>;
			};

			gfx-layer {
				dma-names = "gfx0";
				dmas = <0x21 0x3>;
			};

			i2c-bus {
			};

			zynqmp_dp_snd_codec0 {
				compatible = "xlnx,dp-snd-codec";
				clock-names = "aud_clk";
				clocks = <0x3 0x11>;
				status = "okay";
				phandle = <0x24>;
			};

			zynqmp_dp_snd_pcm0 {
				compatible = "xlnx,dp-snd-pcm";
				dmas = <0x21 0x4>;
				dma-names = "tx";
				status = "okay";
				phandle = <0x22>;
			};

			zynqmp_dp_snd_pcm1 {
				compatible = "xlnx,dp-snd-pcm";
				dmas = <0x21 0x5>;
				dma-names = "tx";
				status = "okay";
				phandle = <0x23>;
			};

			zynqmp_dp_snd_card {
				compatible = "xlnx,dp-snd-card";
				xlnx,dp-snd-pcm = <0x22 0x23>;
				xlnx,dp-snd-codec = <0x24>;
				status = "okay";
			};
		};
	};

	fclk0 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x3 0x47>;
	};

	fclk1 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x3 0x48>;
	};

	fclk2 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x3 0x49>;
	};

	fclk3 {
		status = "okay";
		compatible = "xlnx,fclk";
		clocks = <0x3 0x4a>;
	};

	pss_ref_clk {
		u-boot,dm-pre-reloc;
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <0x1fca055>;
		phandle = <0x6>;
	};

	video_clk {
		u-boot,dm-pre-reloc;
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <0x19bfcc0>;
		phandle = <0x7>;
	};

	pss_alt_ref_clk {
		u-boot,dm-pre-reloc;
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <0x0>;
		phandle = <0x8>;
	};

	gt_crx_ref_clk {
		u-boot,dm-pre-reloc;
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <0x66ff300>;
		phandle = <0xa>;
	};

	aux_ref_clk {
		u-boot,dm-pre-reloc;
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <0x19bfcc0>;
		phandle = <0x9>;
	};

	dp_aclk {
		compatible = "fixed-clock";
		#clock-cells = <0x0>;
		clock-frequency = <0x5f5e100>;
		clock-accuracy = <0x64>;
		phandle = <0x1e>;
	};

	chosen {
		xlnx,eeprom = "/amba/i2c@ff030000/i2c-mux@74/i2c@1/eeprom@54";
		bootargs = "earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/ram rw";
		stdout-path = "serial0:115200n8";
	};

	aliases {
		ethernet0 = "/amba/ethernet@ff0e0000";
		i2c0 = "/amba/i2c@ff030000";
		serial0 = "/amba/serial@ff000000";
		serial1 = "/amba/serial@ff010000";
		spi0 = "/amba/spi@ff0f0000";
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x7ff00000>;
	};

	amba_pl@0 {
		#address-cells = <0x2>;
		#size-cells = <0x2>;
		compatible = "simple-bus";
		ranges;

		v_frmbuf_rd@a2040000 {
			#dma-cells = <0x1>;
			clock-names = "ap_clk";
			clocks = <0x25>;
			compatible = "xlnx,axi-frmbuf-rd-v2.1";
			interrupt-names = "interrupt";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x68 0x4>;
			reg = <0x0 0xa2040000 0x0 0x10000>;
			reset-gpios = <0x13 0x4f 0x1>;
			xlnx,dma-addr-width = <0x20>;
			xlnx,vid-formats = "bgr888", "xbgr8888", "xrgb8888", "vuy888", "xvuy8888", "y8", "yuyv", "uyvy", "nv16", "nv12";
			xlnx,dma-align = <0x10>;
			xlnx,max-height = <0x870>;
			xlnx,max-width = <0xf00>;
			xlnx,pixels-per-clock = <0x2>;
			xlnx,s-axi-ctrl-addr-width = <0x7>;
			xlnx,s-axi-ctrl-data-width = <0x20>;
			xlnx,video-width = <0x8>;
		};

		video_m2m {
			compatible = "xlnx,mem2mem";
			dmas = <0x26 0x0 0x27 0x0>;
			dma-names = "tx", "rx";

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
					direction = "input";

					endpoint {
						remote-endpoint = <0x28>;
						phandle = <0x34>;
					};
				};

				port@1 {
					reg = <0x1>;
					direction = "output";

					endpoint {
						remote-endpoint = <0x29>;
						phandle = <0x33>;
					};
				};
			};
		};

		misc_clk_0 {
			#clock-cells = <0x0>;
			clock-frequency = <0x13c856e7>;
			compatible = "fixed-clock";
			phandle = <0x25>;
		};

		v_hdmi_tx_ss@a2020000 {
			compatible = "xlnx,v-hdmi-tx-ss-3.1";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x6c 0x4>;
			interrupt-names = "hdmitx";
			reg = <0x0 0xa2020000 0x0 0x20000>;
			reg-names = "hdmi-txss";
			clocks = <0x2a 0x2b 0x2c 0x2 0x2d>;
			clock-names = "s_axi_cpu_aclk", "s_axis_video_aclk", "txref-clk", "retimer-clk";
			phy-names = "hdmi-phy0", "hdmi-phy1", "hdmi-phy2";
			phys = <0x2e 0x0 0x1 0x1 0x1 0x2f 0x0 0x1 0x1 0x1 0x30 0x0 0x1 0x1 0x1>;
			xlnx,input-pixels-per-clock = <0x2>;
			xlnx,max-bits-per-component = <0x8>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;

					endpoint {
						remote-endpoint = <0x31>;
						phandle = <0x32>;
					};
				};
			};
		};

		misc_clk_1 {
			#clock-cells = <0x0>;
			clock-frequency = <0x1fca055>;
			compatible = "fixed-clock";
			phandle = <0x36>;
		};

		misc_clk_2 {
			#clock-cells = <0x0>;
			clock-frequency = <0x11b3dc40>;
			compatible = "fixed-clock";
		};

		v_mix@a2070000 {
			compatible = "xlnx,mixer-4.0";
			clock-names = "ap_clk";
			clocks = <0x25>;
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x6e 0x4>;
			reg = <0x0 0xa2070000 0x0 0x10000>;
			reset-gpios = <0x13 0x62 0x1>;
			xlnx,dma-addr-width = <0x20>;
			xlnx,bpc = <0x8>;
			xlnx,ppc = <0x2>;
			xlnx,num-layers = <0xa>;

			port@0 {
				reg = <0x0>;

				endpoint {
					remote-endpoint = <0x32>;
					phandle = <0x31>;
				};
			};

			layer_0 {
				xlnx,layer-id = <0x0>;
				xlnx,vformat = "AR24";
				xlnx,layer-max-width = <0xf00>;
				xlnx,layer-max-height = <0x870>;
				xlnx,layer-primary;
			};

			layer_1 {
				xlnx,layer-id = <0x1>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_2 {
				xlnx,layer-id = <0x2>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_3 {
				xlnx,layer-id = <0x3>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_4 {
				xlnx,layer-id = <0x4>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_5 {
				xlnx,layer-id = <0x5>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_6 {
				xlnx,layer-id = <0x6>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_7 {
				xlnx,layer-id = <0x7>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_8 {
				xlnx,layer-id = <0x8>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			layer_9 {
				xlnx,layer-id = <0x9>;
				xlnx,vformat = "RG24";
				xlnx,layer-max-width = <0xf00>;
			};

			logo {
				xlnx,layer-id = <0xa>;
				xlnx,logo-height = <0x100>;
				xlnx,logo-width = <0x100>;
			};
		};

		v_frmbuf_wr@0xa2000000 {
			compatible = "xlnx,axi-frmbuf-wr-v2.1";
			reg = <0x0 0xa2000000 0x0 0x10000>;
			reset-gpios = <0x13 0x52 0x1>;
			#dma-cells = <0x1>;
			clock-names = "ap_clk";
			clocks = <0x25>;
			interrupt-names = "interrupt";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x6a 0x4>;
			xlnx,dma-addr-width = <0x20>;
			xlnx,dma-align = <0x10>;
			xlnx,max-height = <0x870>;
			xlnx,max-width = <0xf00>;
			xlnx,pixels-per-clock = <0x2>;
			xlnx,vid-formats = "nv12";
			xlnx,video-width = <0x8>;
			phandle = <0x27>;
		};

		v_frmbuf_rd@0xa2010000 {
			compatible = "xlnx,axi-frmbuf-rd-v2.1";
			#dma-cells = <0x1>;
			clock-names = "ap_clk";
			clocks = <0x25>;
			interrupt-names = "interrupt";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x69 0x4>;
			reg = <0x0 0xa2010000 0x0 0x10000>;
			reset-gpios = <0x13 0x51 0x1>;
			xlnx,dma-addr-width = <0x20>;
			xlnx,dma-align = <0x10>;
			xlnx,max-height = <0x870>;
			xlnx,max-width = <0xf00>;
			xlnx,pixels-per-clock = <0x2>;
			xlnx,vid-formats = "nv12";
			xlnx,video-width = <0x8>;
			phandle = <0x26>;
		};

		csc@0xa2200000 {
			compatible = "xlnx,v-vpss-csc";
			reg = <0x0 0xa2200000 0x0 0x10000>;
			reset-gpios = <0x13 0x50 0x1>;
			xlnx,vpss-ppc = <0x2>;
			clocks = <0x25>;
			xlnx,dma-align = <0x10>;
			xlnx,max-height = <0x870>;
			xlnx,max-width = <0xf00>;

			ports {
				#address-cells = <0x1>;
				#size-cells = <0x0>;

				port@0 {
					reg = <0x0>;
					xlnx,video-format = <0x3>;
					xlnx,video-width = <0x8>;

					endpoint {
						remote-endpoint = <0x33>;
						phandle = <0x29>;
					};
				};

				port@1 {
					reg = <0x1>;
					xlnx,video-format = <0x3>;
					xlnx,video-width = <0x8>;

					endpoint {
						remote-endpoint = <0x34>;
						phandle = <0x28>;
					};
				};
			};
		};

		refhdmi {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x2625a00>;
			phandle = <0x35>;
		};

		i2c@a2050000 {
			#address-cells = <0x1>;
			#size-cells = <0x0>;
			status = "okay";
			compatible = "xlnx,xps-iic-2.00.a";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x6d 0x4>;
			reg = <0x0 0xa2050000 0x0 0x1000>;
			clocks = <0x2a>;
			clock-names = "s_axi_aclk";

			clock-generator@6c {
				status = "okay";
				compatible = "idt,idt8t49n24x";
				#clock-cells = <0x1>;
				reg = <0x6c>;
				clocks = <0x35>;
				clock-names = "input-xtal";
				settings = [09 50 00 60 67 c5 6c 01 03 00 31 00 01 40 00 01 40 00 74 04 00 74 04 77 6d 00 00 00 00 00 00 ff ff ff ff 01 3f 00 2e 00 0d 00 00 00 01 00 00 d0 08 00 00 00 00 00 08 00 00 00 00 00 00 44 44 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e9 0a 2b 20 00 00 00 0f 00 00 00 0e 00 00 0e 00 00 00 27 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e3 00 08 01 00 00 00 00 00 00 00 00 00 b0 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 85 00 00 9c 01 d4 02 71 07 00 00 00 00 83 00 10 02 08 8c];
				phandle = <0x2c>;
			};

			hdmi-retimer@5e {
				status = "okay";
				compatible = "ti,dp159";
				reg = <0x5e>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
				#clock-cells = <0x0>;
				phandle = <0x2d>;
			};
		};

		PERIPHERAL@ff380000 {
			compatible = "xlnx,PERIPHERAL-1.0";
			reg = <0x0 0xff380000 0x0 0x80000>;
		};

		PERIPHERAL@ff990000 {
			compatible = "xlnx,PERIPHERAL-1.0";
			reg = <0x0 0xff990000 0x0 0x10000>;
		};

		vcu@a2100000 {
			#clock-cells = <0x1>;
			#address-cells = <0x2>;
			#size-cells = <0x2>;
			clock-names = "pll_ref", "aclk", "vcu_core_enc", "vcu_core_dec", "vcu_mcu_enc", "vcu_mcu_dec";
			clocks = <0x36 0x3 0x47 0x37 0x1 0x37 0x2 0x37 0x3 0x37 0x4>;
			compatible = "xlnx,vcu-1.2", "xlnx,vcu";
			interrupt-names = "vcu_host_interrupt";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x6f 0x4>;
			ranges;
			reg = <0x0 0xa2140000 0x0 0x1000 0x0 0xa2141000 0x0 0x1000>;
			reg-names = "vcu_slcr", "logicore";
			phandle = <0x37>;

			al5d@a0120000 {
				compatible = "al,al5d-1.1", "al,al5d";
				interrupt-parent = <0x4>;
				interrupts = <0x0 0x6f 0x4>;
				reg = <0x0 0xa2120000 0x0 0x10000>;
			};
		};

		vid_stream_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x11e1a300>;
			phandle = <0x2b>;
		};

		vid_s_axi_clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x5f5b9f0>;
			phandle = <0x2a>;
		};

		clock-generator-hdmi-dru-clk {
			compatible = "fixed-clock";
			#clock-cells = <0x0>;
			clock-frequency = <0x9502f90>;
			phandle = <0x38>;
		};

		vid_phy_controller@a2060000 {
			compatible = "xlnx,vid-phy-controller-2.2";
			interrupt-parent = <0x4>;
			interrupts = <0x0 0x6b 0x4>;
			reg = <0x0 0xa2060000 0x0 0x10000>;
			clocks = <0x2a 0x38>;
			clock-names = "vid_phy_axi4lite_aclk", "dru-clk";
			xlnx,input-pixels-per-clock = <0x2>;
			xlnx,nidru = <0x1>;
			xlnx,nidru-refclk-sel = <0x5>;
			xlnx,rx-no-of-channels = <0x3>;
			xlnx,rx-pll-selection = <0x0>;
			xlnx,rx-protocol = <0x1>;
			xlnx,rx-refclk-sel = <0x1>;
			xlnx,tx-no-of-channels = <0x3>;
			xlnx,tx-pll-selection = <0x6>;
			xlnx,tx-protocol = <0x1>;
			xlnx,tx-refclk-sel = <0x0>;
			xlnx,hdmi-fast-switch = <0x1>;
			xlnx,transceiver-type = <0x5>;
			xlnx,tx-buffer-bypass = <0x1>;
			xlnx,transceiver-width = <0x2>;

			vphy_lane@0 {
				#phy-cells = <0x4>;
				phandle = <0x2e>;
			};

			vphy_lane@1 {
				#phy-cells = <0x4>;
				phandle = <0x2f>;
			};

			vphy_lane@2 {
				#phy-cells = <0x4>;
				phandle = <0x30>;
			};

			vphy_lane@3 {
				#phy-cells = <0x4>;
			};
		};

		misc_clk_4 {
			#clock-cells = <0x0>;
			clock-frequency = <0x5f5e100>;
			compatible = "fixed-clock";
		};
	};
};
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Teacher
Teacher
1,072 Views
Registered: ‎06-16-2013

Hi @peakpeak 

 

Sorry for my late reply.

I confirmed dts file. I found some incomprehensible descriptions.

I guess it seems route cause. But I couldn't determine it.

 

Q1) Why are you using rootfs as ram ? How many size is your rootfs ? (Make sure memory size of kernel.)

Q2) What is your video graph/media graph ? I can't image them with your dts file. (What is your purpose in this image ? I guess it seems root cause...)

Q3) Why are you using two frmbuf_rd ? To mix them in v_mixer ? (Make sure drm graph. It's not related v4l2/media graph.)

 

Best regards,

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Adventurer
Adventurer
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Registered: ‎03-31-2020

Hi @watari,

1. My rootfs.tar.gz capacity is  525MB. I think memory is not a problem as this configuration worked if I don't use V4L2 drivers.

2. Please check my design for your information. My aim is at getting the decoded frames from VCU and do some further processing (eg. VPSS functionalities).

3. You are correct, the v_frmbuf_rd@a2040000 is to mix in the mixer. The v_frmbuf_rd@0xa2010000 and
v_frmbuf_wr@0xa2000000 are to read and write frames from memory.

Screenshot from 2020-07-03 08-59-55.png

 

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Teacher
Teacher
1,048 Views
Registered: ‎06-16-2013

Hi @peakpeak 

 

>2. Please check my design for your information.

 

Would you share it as pdf file ?

I can't confirm IP name and connection.

 

>My aim is at getting the decoded frames from VCU and do some further processing (eg. VPSS functionalities).

 

If my understanding is correct, your design doesn't have any v4l2 and/or media graph.

Why are you using CSC for v4l2 driver in your linux, even if it ?

 

It seems this is root cause...

 

Best regards,

Highlighted
Adventurer
Adventurer
1,041 Views
Registered: ‎03-31-2020

Hi @watari,

Please check the pdf file in the attachment.

I think I need to use it as a V4L2 element as stated in page 160 of this document: https://www.xilinx.com/support/documentation/ip_documentation/vcu/v1_2/pg252-vcu.pdf

I am going to use PL DDR for the decoding, so it seems to require a memory copy between different DDRs, and I need to do colorspace conversion during the memory mapping. Is it something reasonable? (In the above design, the PL DDR was not put into)

As far as I understand, I am trying to follow this instruction:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80674831/Mem+2+Mem+VPSS-CSC+Composite+device

 

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @peakpeak 

 

I confirmed your dts file again and found some contradictions in it.

Would you make sure them ? Especially make sure specification and limitation of each IPs and kernel driver.

 

I guess it seems one of route cause.

 

Best regards,

 

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Adventurer
Adventurer
966 Views
Registered: ‎03-31-2020

Hi @watari,

Could you please help let me know in details, especially the media graph, as I could not find a comprehensive overview documentation about this? Eventhough I tried to understand via the VCU TRD.

Frankly speaking, I have a limited understanding about this, and I have checked through the dts but could not find the contradictions...

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Teacher
Teacher
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Registered: ‎06-16-2013

Hi @peakpeak 

 

I suggest you to refer and read the document of following IPs and kernel drivers.

You can find some contradictions in dts.

Also they are related with video and media graph.

 

- V4L2 VPSS CSC

- frmbuf_rd

- frmbuf_wr

- VCU

 

Best regards,

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Adventurer
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Registered: ‎03-31-2020

Hi @watari 

Thank you for your suggestions, as I got lost in those documentation already

Could you please highlight the parts that you found the contradictions occured?

I put exactly the same as in https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80674831/Mem+2+Mem+VPSS-CSC+Composite+device 

It's strange to me that the petalinux build put errors in

xlnx,video-format = <XVIP_VF_RBG>;

and I had to changed that to xlnx,video-format = <2>;

 

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Adventurer
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Registered: ‎09-17-2013

请问您怎么解决的 ,我也遇到一样的问题?
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Hi @watari 

Sorry for disturbing you again, but I am still not be able to identify the contradictions. Could you please have a look and let me know how to use the V4L2 driver for the below case as per your suggestions?

https://forums.xilinx.com/t5/Video-and-Audio/Multiple-VPSS-instance-in-a-design/m-p/1135939/highlight/true#M33623

 

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Teacher
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Hi @peakpeak 

 

Refer and read closely the following URL.

You can find wrong point and resolve your issue.

 

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80707675/Mem+2+Mem+VPSS-CSC+VPSS-SC+device

 

Best regards,

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Adventurer
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Hi @watari,

To be honest, I have been reading that link over and over again, it took me months to investigate but could not find out the root cause. Could you please highlight the points?

Thank you very much in advance...

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@watari 

I have the same problem that has been bothering me for a month. It always gets OOPs error. The vivado2019.2 and Petalinux2019.2 that I used, I replicated the design to in the Wiki. https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/80707675/Mem+2+Mem+VPSS-CSC+VPSS-SC+device,

I suspect there is a problem with petalinux Linux-Kernel memory operation.The mem2mem driver will initialize if I remove the VPSS IP from the design but when I add any video IP between the frmbuf_rd and frmbuf_wr, the oops occurs. It seems, looking at the call trace, that the error happens while trying to add the media device but have no idea why.

[   12.046525] xilinx-mem2mem video_m2m: mem2mem device registered
[   12.052678] xilinx-mem2mem video_m2m: Entity type for entity a0010000.v_proc_ss was not initialized!
[   12.061836] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
[   12.070613] Mem abort info:
[   12.073403]   ESR = 0x96000045
[   12.076450]   Exception class = DABT (current EL), IL = 32 bits
[   12.082361]   SET = 0, FnV = 0
[   12.085407]   EA = 0, S1PTW = 0
[   12.088541] Data abort info:
[   12.091413]   ISV = 0, ISS = 0x00000045
[   12.095238]   CM = 0, WnR = 1
[   12.098193] [0000000000000000] user address but active_mm is swapper
[   12.104541] Internal error: Oops: 96000045 [#1] SMP
[   12.109404] Modules linked in:
[   12.112454] CPU: 1 PID: 17 Comm: kworker/1:0 Not tainted 4.19.0-xilinx-v2019.1 #1
[   12.119926] Hardware name: xlnx,zynqmp (DT)
[   12.124111] Workqueue: events deferred_probe_work_func
[   12.129240] pstate: 40000005 (nZcv daif -PAN -UAO)
[   12.134026] pc : media_add_link+0x38/0x48
[   12.138024] lr : media_add_link+0x24/0x48
[   12.142023] sp : ffffff80091c39e0
[   12.145321] x29: ffffff80091c39e0 x28: ffffffc07fef4a58
[   12.150626] x27: ffffffc010b44c18 x26: ffffffc07fef4460
[   12.155929] x25: ffffffc010b44db0 x24: ffffffc010b44c18
[   12.161233] x23: 0000000000000001 x22: 0000000000000000
[   12.166536] x21: 0000000000000038 x20: ffffffc06d2dcf80
[   12.171840] x19: ffffffc06ccd9068 x18: 0000000000000010
[   12.177143] x17: 0000000000000000 x16: 0000000000000000
[   12.182447] x15: ffffffffffffffff x14: 0000000000000000
[   12.187750] x13: 0000000000000000 x12: 0000000000000000
[   12.193054] x11: 0000000000000018 x10: ffffff80090a1f40
[   12.198357] x9 : 0000000000000000 x8 : ffffffc06d2dcf80
[   12.203661] x7 : 0000000000000000 x6 : 000000000000003f
[   12.208964] x5 : 0000000000000040 x4 : 0000000000000000
[   12.214268] x3 : ffffffc06d2dcf00 x2 : ffffffc06d2dcf20
[   12.219571] x1 : 0000000000000000 x0 : ffffffc06d2dcf00

 

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Adventurer
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Registered: ‎03-31-2020

Thanks @jianqingping,

However, I could not resolve the issue.

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Teacher
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Hi @peakpeak 

 

FYI.

 

Did you make sure the following codes ?

 

https://github.com/Xilinx/linux-xlnx/blob/0bf5e5fe96bf3663f5d47e01d7f8d0e4d737e492/drivers/media/mc/mc-entity.c#L694-L696

 

Kernel panic is occurred by this macro in your case.

Also, you must set proper parameter on media device when linux kernel adds media node.

 

Would you make sure and consider it ?

 

Best regards,

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Adventurer
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@peakpeak  

I couldn't solve the problem. I gave up VPSS,

Use multi scaler instead.