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Adventurer
Adventurer
3,238 Views
Registered: ‎09-10-2008

Verifying Filter design using Core gen

I developed a decimator (filter) using FIR Compiler and I am having very difficult time verifying filter outputs.  Any suggestion  on how to verify filter design without using Sys Gen?  I am currently simulating my design in ModelSim.  I also wrote convolution equation in python to verify filter output data (which is correct) but I like to know if the filter is actually filtering out specific freq.  Can this be verified with something other than System Generator?

 

b

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Xilinx Employee
Xilinx Employee
3,207 Views
Registered: ‎11-28-2007

 

I assume when you say "System Generator" you really mean Matlab? If you're serious about doing DSP designs, you should really think about getting Matlab/Simulink because it will save you lots of time and effort. Anyway, you would need something to do spectrum analysis to verify that your FIR filter meets the specs (passband/stopband frequency, passband ripple, stopband attenuation, etc).

@bin2599 wrote:

I developed a decimator (filter) using FIR Compiler and I am having very difficult time verifying filter outputs.  Any suggestion  on how to verify filter design without using Sys Gen?  I am currently simulating my design in ModelSim.  I also wrote convolution equation in python to verify filter output data (which is correct) but I like to know if the filter is actually filtering out specific freq.  Can this be verified with something other than System Generator?

 

b


 

Cheers,
Jim
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