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kaesar
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Registered: ‎01-09-2017

Video Frame Buffer

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Hi, I am working on a video program with ZC706 board (vivado 2019.1); I make a simple project which just writes some data through Video Frame Buffer Write IP to DDR3. The block design is figure 1; I am using an AXI4-Lite master state machine to control the Video Frame Buffer Write IP, and I use a VIO IP to start the controller. I have two confusion: 1、there is a memory format(0x0028) register, I don’t know what should be written to set the format as RGB8? Figure 2 and figure 3. 2、when I tracing the video data, I find that the AXI_DATA_READY output signal from Video Frame Buffer Write IP just high two clocks then always low, without video data output first or Video Frame Buffer Write IP control first. The control logic is figure 4, and video data figure is figure5. I need someone help.
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ashokkum
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Registered: ‎04-09-2019

Hello @kaesar ,

1. There is a memory format(0x0028) register, I don’t know what should be written to set the format as RGB8?

As addressed in the Table 2-8 of the PG278, User has to set Video Format ID as 20 to set the video format as RGB8.

2. when I tracing the video data, I find that the AXI_DATA_READY output signal from Video Frame Buffer Write IP just high two clocks then always low, without video data output first or Video Frame Buffer Write IP control first. The control logic is figure 4, and video data figure is figure5.

AXI4-Lite ctrl talks about the configuration of the Video Frame buffer IP. AXI-4 Stream Interface is for processing the video data between master and slave modules. based on the video format and amount of the pixels configured per clock, the memory mapped AXI4 stream interface will get configured. So, please make sure that the Video Frame Buffer IP configuration is proper or not.

For a detailed description of each interface, and the ports descriptions are addressed in the 11th and 18th pages of PG278. Please go through it.

Regards,

Ashok

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kaesar
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kaesar
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2.png
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kaesar
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2.png
2.png
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ashokkum
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Registered: ‎04-09-2019

Hello @kaesar ,

1. There is a memory format(0x0028) register, I don’t know what should be written to set the format as RGB8?

As addressed in the Table 2-8 of the PG278, User has to set Video Format ID as 20 to set the video format as RGB8.

2. when I tracing the video data, I find that the AXI_DATA_READY output signal from Video Frame Buffer Write IP just high two clocks then always low, without video data output first or Video Frame Buffer Write IP control first. The control logic is figure 4, and video data figure is figure5.

AXI4-Lite ctrl talks about the configuration of the Video Frame buffer IP. AXI-4 Stream Interface is for processing the video data between master and slave modules. based on the video format and amount of the pixels configured per clock, the memory mapped AXI4 stream interface will get configured. So, please make sure that the Video Frame Buffer IP configuration is proper or not.

For a detailed description of each interface, and the ports descriptions are addressed in the 11th and 18th pages of PG278. Please go through it.

Regards,

Ashok

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kaesar
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about the first question, i should write 0x14(20) to Memory Video Format address(0x0028), am i right? thanks a lot.
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ashokkum
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Registered: ‎04-09-2019

Hello @kaesar ,

Yes, you are right.

Regards,

Ashok

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